[PATCH] D21235: [x86, SSE] change patterns for CMPP to float types to allow matching with SSE1 (PR28044)

[Sanjay Patel via llvm-commits]

spatel added a comment.

In http://reviews.llvm.org/D21235#455044, @RKSimon wrote:

> Is already a number of SSE1/SSE2+ test cases covering all the float comparisons? All I know of is vector-compare-results.ll


I don't think there's an exhaustive test for each possible fcmp predicate in IR, but most of them are covered in commute-fcmp.ll after:
http://reviews.llvm.org/rL272397

Also, I have a patch in progress for the intrinsic reduction that gets enabled by this, and that will change:
sse-intrinsics-fast-isel.ll
sse2-intrinsics-fast-isel.ll
to IR fcmp tests rather than llvm.x86.sse[2].cmp.[ps/pd], so we should have complete coverage after that.


http://reviews.llvm.org/D21235