[PATCH] D21183: Better selection of common base address in constant hoisting

[Chad Rosier via llvm-commits]

mcrosier added a comment.

I haven't run actual numbers, but I did diff a few Spec2006 binaries with this patch applied.  In general, I see more instructions on AArch64 (a target that doesn't implement the isImmediateInRangeForLoad hook).

For example, here's the diff for gcc:
Opcode static count diff summary:

    -304  movk w #
    -258  sub w w #
     -37  mov w #
     -27  ldr x [x #]
     -27  add w w w
     -18  mov x x
     -16  sub w w # lsl #
      -9  b 
      -6  ldp x x [x #] #
      -6  stp x x [x #]!
      -3  fadd s s s
      -2  sub x x # lsl #
      -2  str s [x #]
      -2  ldr s [x #]
      -1  fsub s s s
      -1  fmov s w
      -1  ldp s s [x #]
      -1  fmul s s s
      -1  stp s s [x #]
      -1  sub x x #
      -1  add x x x
      -1  scvtf s x
       1  orr w w #
       1  cbz/nz w 
       1  ldrb w [x #]
       2  and w w #
       3  orr w w w
       3  cbz/nz x 
       4  str x [x #]
       5  str w [x #]
       5  ldr x [x #] #
       5  str x [x #]!
       6  add x x # lsl #
       7  ldr w [x #]
       9  bl  
      19  ldp x x [x #]
      20  mov w w
      22  stp x x [x #]
      43  add x x #
      54  add w w # lsl #
      57  adrp x  
     783  add w w #
  -------------------------
    1050  added (excluding nops)
     725  removed (excluding nops)
     325  net (excluding nops)
    1050  added
     725  removed
     325  net

In short, an additional 325 static instructions are introduced.

Here's the diff for Sphinx:
Opcode static count diff summary:

     -22  mov x x
     -16  adrp x  
      -5  mov w #
      -3  sub x x #
      -2  stp x x [x #]
      -1  ldrb w [x #]!
      -1  bl  
      -1  orr w w #
      -1  strb w [x #]!
      -1  ldp x x [x #]
      -1  ldr w [x #]!
      -1  movk w #
       1  ldrb w [x #]
       1  ldr w [x #]
       3  str x [x #]
       4  b 
       7  add x x # lsl #
      13  add x x #
      31  ldr x [x #]
  -------------------------
      60  added (excluding nops)
      55  removed (excluding nops)
       5  net (excluding nops)
      60  added
      55  removed
       5  net

I see many more loads, but I haven't investigated further.  Interestingly enough for sjeng I see an opposite trend (more adds and fewer loads).

I'm going to see if I can implement the isImmediateInRangeForLoad for AArch64.


================
Comment at: lib/Transforms/Scalar/ConstantHoisting.cpp:391
@@ -384,1 +390,3 @@
 
+void ConstantHoisting::printOffsetRange(ConstCandVecType::iterator P1, ConstCandVecType::iterator P2) {
+  DEBUG(dbgs() << "Range: [");
----------------
Rather than wrap all these dbgs() print statements with the DEBUG macro, why not just wrap the call to printOffsetRange() with the DEBUG macro.  IMO, this makes it more clear that this is just a debug dump in the context of the caller.


http://reviews.llvm.org/D21183