[PATCH] D21160: [NVPTX] Add intrinsics for shfl instructions.

[Justin Lebar via llvm-commits]

jlebar created this revision.
jlebar added a reviewer: tra.
jlebar added subscribers: jholewinski, llvm-commits.

Currently clang emits these instructions via inline (volatile) asm in
the CUDA headers.  Switching to intrinsics will let the optimizer reason
across calls to these intrinsics.

http://reviews.llvm.org/D21160

Files:
  include/llvm/IR/IntrinsicsNVVM.td
  lib/Target/NVPTX/NVPTXIntrinsics.td
  test/CodeGen/NVPTX/shfl.ll

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