[PATCH] D21091: AArch64: refactor sysreg handling (new TableGen backend!)
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 7 12:24:16 PDT 2016
ab added a subscriber: ab.
ab added a comment.
Ooh, shiny! Looks like a nice cleanup to me.
A couple high-level comments.
================
Comment at: include/llvm/TableGen/SearchableTable.td:46-48
@@ +45,4 @@
+
+class Code<code val> {
+ code Field = val;
+}
----------------
Hmm, why not use 'code' directly?
================
Comment at: lib/Target/AArch64/AArch64SystemOperands.td:21-26
@@ +20,8 @@
+
+def ATMapping : MappingKind {
+ let InstanceClass = "AT";
+ let Fields = ["Name", "Encoding"];
+ let SearchableFields = ["Name", "Encoding"];
+ let EnumValueField = "Encoding";
+}
+
----------------
The MappingKind defs are a bit awkward; maybe inherit from MappingKind itself in AT/DB/..., get rid of InstanceClass, and pass the fields as template arguments?
That also lets you nicely factor out the similar Fields/SearchableFields/... here.
================
Comment at: utils/TableGen/SearchableTableEmitter.cpp:10-12
@@ +9,5 @@
+//
+// This tablegen backend emits an index of definitions in ctags(1) format.
+// A helper script, utils/TableGen/tdtags, provides an easier-to-use
+// interface; run 'tdtags -H' for documentation.
+//
----------------
Stale description
Repository:
rL LLVM
http://reviews.llvm.org/D21091
More information about the llvm-commits
mailing list