[PATCH] D20965: [X86][SSE] Add general lowering of nontemporal vector loads

[Craig Topper via llvm-commits]

craig.topper added inline comments.

================
Comment at: lib/Target/X86/X86InstrAVX512.td:3378
@@ -3340,1 +3377,3 @@
+  def : Pat<(v16i8 (alignednontemporalload addr:$src)),
+            (VMOVNTDQAZ128rm addr:$src)>;
 }
----------------
Aren't 128/256 integer loads still promoted to v2i64 and v4i64 even when AVX512 is enabled?


Repository:
  rL LLVM

http://reviews.llvm.org/D20965