[llvm] r271665 - Currently AsmWriterEmiter.cpp (used by tblgen -gen-asm-writer) does not

[Sjoerd Meijer via llvm-commits]

Author: sjoerdmeijer
Date: Fri Jun  3 08:14:19 2016
New Revision: 271665

URL: http://llvm.org/viewvc/llvm-project?rev=271665&view=rev
Log:
Currently AsmWriterEmiter.cpp (used by tblgen -gen-asm-writer) does not
consider the Predicates attached to InstAlias when generating printAliasInstr.
This forces users of printAliasInstr to check those predicates beforehand.

This commit adds them in the condition set of the IAPrinter object.

Patch by: Roger Ferrer Ibanez

Differential Revision: http://reviews.llvm.org/D20233


Modified:
    llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp

Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=271665&r1=271664&r2=271665&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Fri Jun  3 08:14:19 2016
@@ -601,7 +601,6 @@ namespace {
 class IAPrinter {
   std::vector<std::string> Conds;
   std::map<StringRef, std::pair<int, int>> OpMap;
-  SmallVector<Record*, 4> ReqFeatures;
 
   std::string Result;
   std::string AsmString;
@@ -648,7 +647,7 @@ public:
   }
 
   void print(raw_ostream &O) {
-    if (Conds.empty() && ReqFeatures.empty()) {
+    if (Conds.empty()) {
       O.indent(6) << "return true;\n";
       return;
     }
@@ -798,6 +797,18 @@ void AsmWriterEmitter::EmitPrintAliasIns
 
       IAPrinter IAP(CGA.Result->getAsString(), CGA.AsmString);
 
+      std::string Namespace = Target.getName();
+      std::vector<Record *> ReqFeatures;
+      if (PassSubtarget) {
+        // We only consider ReqFeatures predicates if PassSubtarget
+        std::vector<Record *> RF =
+            CGA.TheDef->getValueAsListOfDefs("Predicates");
+        std::copy_if(RF.begin(), RF.end(), std::back_inserter(ReqFeatures),
+                     [](Record *R) {
+                       return R->getValueAsBit("AssemblerMatcherPredicate");
+                     });
+      }
+
       unsigned NumMIOps = 0;
       for (auto &Operand : CGA.ResultOperands)
         NumMIOps += Operand.getMINumOperands();
@@ -902,6 +913,27 @@ void AsmWriterEmitter::EmitPrintAliasIns
       }
 
       if (CantHandle) continue;
+
+      for (auto I = ReqFeatures.cbegin(); I != ReqFeatures.cend(); I++) {
+        Record *R = *I;
+        std::string AsmCondString = R->getValueAsString("AssemblerCondString");
+
+        // AsmCondString has syntax [!]F(,[!]F)*
+        SmallVector<StringRef, 4> Ops;
+        SplitString(AsmCondString, Ops, ",");
+        assert(!Ops.empty() && "AssemblerCondString cannot be empty");
+
+        for (auto &Op : Ops) {
+          assert(!Op.empty() && "Empty operator");
+          if (Op[0] == '!')
+            Cond = "!STI.getFeatureBits()[" + Namespace + "::" +
+                   Op.substr(1).str() + "]";
+          else
+            Cond = "STI.getFeatureBits()[" + Namespace + "::" + Op.str() + "]";
+          IAP.addCond(Cond);
+        }
+      }
+
       IAPrinterMap[Aliases.first].push_back(std::move(IAP));
     }
   }