[PATCH] D20949: [AggressiveAntiDepBreaker] Don't change aliased registers of liveins to alive in StartBlock

[Chuang-Yu Cheng via llvm-commits]

cycheng created this revision.
cycheng added reviewers: hfinkel, nemanjai, tjablin, kbarton, amehsan.
cycheng added a subscriber: llvm-commits.

Current AADB will set aliased registers of liveins to alive in StartBlock, but this is unreasonable, because we will lose rename chances for any rename-able registers of liveins if any of their aliased registers are not be defined.

To correct this, in StartBlock, we only change livein registers to alive, but not include their alias registers.

I've tested the patch on PowerPC, bootstrap test, spec2006 test, llvm test, all result are correct.

http://reviews.llvm.org/D20949

Files:
  lib/CodeGen/AggressiveAntiDepBreaker.cpp
  test/CodeGen/PowerPC/ppc64-aadb.ll

Index: test/CodeGen/PowerPC/ppc64-aadb.ll
===================================================================
--- /dev/null
+++ test/CodeGen/PowerPC/ppc64-aadb.ll
@@ -0,0 +1,63 @@
+; RUN: llc < %s -break-anti-dependencies=all -march=ppc64 -mcpu=pwr8  | FileCheck %s
+
+; Create a scenario that next.bb uses many variables (VSX registers) comes
+; from bb, in this case, they are: %2 %3 %add15. These use will prevent original
+; Aggressive Anti-Dependency Breaker from renaming many false dependency VSX
+; registers in bb.
+;
+; We correct this behaviour and use this test case to guard the new behaviour.
+define double @aadb(double* nocapture readonly %d, i32 signext %val) #0 {
+bb:
+  %0 = load double, double* %d
+  %arrayidx1 = getelementptr inbounds double, double* %d, i64 1
+  %1 = load double, double* %arrayidx1
+  %arrayidx2 = getelementptr inbounds double, double* %d, i64 2
+  %2 = load double, double* %arrayidx2
+  %arrayidx3 = getelementptr inbounds double, double* %d, i64 3
+  %3 = load double, double* %arrayidx3
+  %add = fadd double %0, %1
+  %add4 = fadd double %2, %3
+  %sub = fsub double %add, %add4
+  %mul = fmul double %0, %1
+  %add5 = fadd double %mul, %sub
+  %mul6 = fmul double %0, %2
+  %add7 = fadd double %mul6, %add5
+  %mul8 = fmul double %0, %3
+  %sub9 = fsub double %add7, %mul8
+  %mul10 = fmul double %1, %2
+  %sub11 = fsub double %sub9, %mul10
+  %mul12 = fmul double %1, %3
+  %sub13 = fsub double %sub11, %mul12
+  %mul14 = fmul double %2, %3
+  %add15 = fadd double %mul14, %sub13
+  %tobool = icmp eq i32 %val, 0
+  br i1 %tobool, label %end, label %next.bb
+
+; CHECK-LABEL: aadb
+; CHECK: BB#0
+; CHECK-DAG: xssubdp 1
+; CHECK-DAG: xsadddp 5
+; CHECK-DAG: xsmuldp 8
+; CHECK-DAG: xsmuldp 9
+; CHECK-DAG: xsmuldp 10
+; CHECK-DAG: xsmuldp 11
+; CHECK-DAG: xsmuldp 12
+; CHECK-DAG: xsmuldp 13
+
+next.bb:
+  %arrayidx16 = getelementptr inbounds double, double* %d, i64 4
+  %4 = load double, double* %arrayidx16
+  %arrayidx17 = getelementptr inbounds double, double* %d, i64 5
+  %5 = load double, double* %arrayidx17
+  %mul18 = fmul double %4, %5
+  %sub19 = fsub double %0, %1
+  %sub20 = fsub double %mul18, %sub19
+  %sub21 = fsub double %2, %3
+  %sub22 = fsub double %sub20, %sub21
+  %add23 = fadd double %add15, %sub22
+  br label %end
+
+end:
+  %result.0 = phi double [ %add23, %next.bb ], [ %add15, %bb ]
+  ret double %result.0
+}
Index: lib/CodeGen/AggressiveAntiDepBreaker.cpp
===================================================================
--- lib/CodeGen/AggressiveAntiDepBreaker.cpp
+++ lib/CodeGen/AggressiveAntiDepBreaker.cpp
@@ -150,12 +150,10 @@
   for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
          SE = BB->succ_end(); SI != SE; ++SI)
     for (const auto &LI : (*SI)->liveins()) {
-      for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) {
-        unsigned Reg = *AI;
-        State->UnionGroups(Reg, 0);
-        KillIndices[Reg] = BB->size();
-        DefIndices[Reg] = ~0u;
-      }
+      unsigned Reg = LI.PhysReg;
+      State->UnionGroups(Reg, 0);
+      KillIndices[Reg] = BB->size();
+      DefIndices[Reg] = ~0u;
     }
 
   // Mark live-out callee-saved registers. In a return block this is


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