[PATCH] D20443: [PowerPC] - Combine loads of v4i8 to loads of i32 followed by bitcast

[Ehsan Amiri via llvm-commits]

amehsan added inline comments.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:10307
@@ +10306,3 @@
+
+  SDValue SrcVec = Ext1.getOperand(0);
+  int FirstElem = Ext1.getConstantOperandVal(1);
----------------
This can be sunk further down, right before where we actually use it.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:10308-10309
@@ +10307,4 @@
+  SDValue SrcVec = Ext1.getOperand(0);
+  int FirstElem = Ext1.getConstantOperandVal(1);
+  int SecondElem = Ext2.getConstantOperandVal(1);
+  int SubvecIdx;
----------------
If I am reading everything correctly you need to add some code here, to prevent an assertion. 

First of all the comment in include/llvm/CodeGen/ISDOpcodes.h above definition of EXTRACT_VECTOR_ELT says that index into the vector might be variable. Implementation of getConstantOperandVal uses a cast<ConstantSDNode> which "causing an assertion failure if it is not really an instance of the right type" according to http://llvm.org/docs/ProgrammersManual.html#the-isa-cast-and-dyn-cast-templates


Repository:
  rL LLVM

http://reviews.llvm.org/D20443