[PATCH] D20905: Only attempt to detect AVG if SSE2 is available

[Dimitry Andric via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL271548: Only attempt to detect AVG if SSE2 is available (authored by dim).

Changed prior to commit:
  http://reviews.llvm.org/D20905?vs=59418&id=59421#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D20905

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll

Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -27793,6 +27793,8 @@
   if (InScalarVT.getSizeInBits() <= ScalarVT.getSizeInBits())
     return SDValue();
 
+  if (!Subtarget.hasSSE2())
+    return SDValue();
   if (Subtarget.hasAVX512()) {
     if (VT.getSizeInBits() > 512)
       return SDValue();
Index: llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll
+++ llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s
+
+define <16 x i8> @PR27973() {
+; CHECK-LABEL: PR27973:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movb $0, 15(%rdi)
+; CHECK-NEXT:    movb $0, 14(%rdi)
+; CHECK-NEXT:    movb $0, 13(%rdi)
+; CHECK-NEXT:    movb $0, 12(%rdi)
+; CHECK-NEXT:    movb $0, 11(%rdi)
+; CHECK-NEXT:    movb $0, 10(%rdi)
+; CHECK-NEXT:    movb $0, 9(%rdi)
+; CHECK-NEXT:    movb $0, 8(%rdi)
+; CHECK-NEXT:    movb $0, 7(%rdi)
+; CHECK-NEXT:    movb $0, 6(%rdi)
+; CHECK-NEXT:    movb $0, 5(%rdi)
+; CHECK-NEXT:    movb $0, 4(%rdi)
+; CHECK-NEXT:    movb $0, 3(%rdi)
+; CHECK-NEXT:    movb $0, 2(%rdi)
+; CHECK-NEXT:    movb $0, 1(%rdi)
+; CHECK-NEXT:    movb $0, (%rdi)
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    retq
+;
+  %t0 = zext <16 x i8> zeroinitializer to <16 x i32>
+  %t1 = add nuw nsw <16 x i32> %t0, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
+  %t2 = lshr <16 x i32> %t1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
+  %t3 = trunc <16 x i32> %t2 to <16 x i8>
+  ret <16 x i8> %t3
+}


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