[polly] r271534 - [FIX] Correctly translate i1 expressions
Johannes Doerfert via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 2 09:57:12 PDT 2016
Author: jdoerfert
Date: Thu Jun 2 11:57:12 2016
New Revision: 271534
URL: http://llvm.org/viewvc/llvm-project?rev=271534&view=rev
Log:
[FIX] Correctly translate i1 expressions
Added:
polly/trunk/test/ScopInfo/i1_params.ll
Modified:
polly/trunk/lib/Support/SCEVAffinator.cpp
polly/trunk/test/ScopInfo/multiple-types-non-affine-2.ll
polly/trunk/test/ScopInfo/multiple-types-non-affine.ll
Modified: polly/trunk/lib/Support/SCEVAffinator.cpp
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/lib/Support/SCEVAffinator.cpp?rev=271534&r1=271533&r2=271534&view=diff
==============================================================================
--- polly/trunk/lib/Support/SCEVAffinator.cpp (original)
+++ polly/trunk/lib/Support/SCEVAffinator.cpp Thu Jun 2 11:57:12 2016
@@ -265,7 +265,8 @@ __isl_give PWACtx SCEVAffinator::visit(c
PWAC = checkForWrapping(Expr, PWAC);
}
- combine(PWAC, visitConstant(Factor), isl_pw_aff_mul);
+ if (!Factor->getType()->isIntegerTy(1))
+ combine(PWAC, visitConstant(Factor), isl_pw_aff_mul);
// For compile time reasons we need to simplify the PWAC before we cache and
// return it.
Added: polly/trunk/test/ScopInfo/i1_params.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScopInfo/i1_params.ll?rev=271534&view=auto
==============================================================================
--- polly/trunk/test/ScopInfo/i1_params.ll (added)
+++ polly/trunk/test/ScopInfo/i1_params.ll Thu Jun 2 11:57:12 2016
@@ -0,0 +1,47 @@
+; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
+;
+; Check that both a signed as well as an unsigned extended i1 parameter
+; is represented correctly.
+;
+; void f(signed i1 p0, unsigned i1 p1, int *A) {
+; for (int i = 0; i < 100; i++)
+; A[i + p0] = A[i + p1];
+; }
+;
+; CHECK: Context:
+; CHECK-NEXT: [p1, p0] -> { : -1 <= p1 <= 0 and -1 <= p0 <= 0 }
+;
+; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
+; CHECK-NEXT: [p1, p0] -> { Stmt_for_body[i0] -> MemRef_A[1 + i0] : p1 = -1; Stmt_for_body[i0] -> MemRef_A[i0] : p1 = 0 };
+; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
+; CHECK-NEXT: [p1, p0] -> { Stmt_for_body[i0] -> MemRef_A[p0 + i0] };
+;
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+define void @f(i1 %p0, i1 %p1, i32* %A) {
+entry:
+ %tmp4 = sext i1 %p0 to i64
+ %tmp = zext i1 %p1 to i64
+ br label %for.cond
+
+for.cond: ; preds = %for.inc, %entry
+ %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ]
+ %exitcond = icmp ne i64 %indvars.iv, 100
+ br i1 %exitcond, label %for.body, label %for.end
+
+for.body: ; preds = %for.cond
+ %tmp5 = add nsw i64 %indvars.iv, %tmp
+ %arrayidx = getelementptr inbounds i32, i32* %A, i64 %tmp5
+ %tmp6 = load i32, i32* %arrayidx, align 4
+ %tmp7 = add nsw i64 %indvars.iv, %tmp4
+ %arrayidx3 = getelementptr inbounds i32, i32* %A, i64 %tmp7
+ store i32 %tmp6, i32* %arrayidx3, align 4
+ br label %for.inc
+
+for.inc: ; preds = %for.body
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ br label %for.cond
+
+for.end: ; preds = %for.cond
+ ret void
+}
Modified: polly/trunk/test/ScopInfo/multiple-types-non-affine-2.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScopInfo/multiple-types-non-affine-2.ll?rev=271534&r1=271533&r2=271534&view=diff
==============================================================================
--- polly/trunk/test/ScopInfo/multiple-types-non-affine-2.ll (original)
+++ polly/trunk/test/ScopInfo/multiple-types-non-affine-2.ll Thu Jun 2 11:57:12 2016
@@ -24,15 +24,15 @@
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb2[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Short[o0] : 32*floor((8 + i0)/16) = o0 + 16*floor((i0)/8) and -14 + 2i0 - o0 <= 16*floor((i0)/8) <= 16 + 2i0 - o0 }
+; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Short[16] : 16*floor((8 + i0)/16) > i0; Stmt_bb2[i0] -> MemRef_Short[0] : 16*floor((8 + i0)/16) <= i0 }
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Short[o0] : 2i0 <= o0 <= 1 + 2i0 };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Char[o0] : 64*floor((8 + i0)/16) = o0 + 32*floor((i0)/8) and -28 + 4i0 - o0 <= 32*floor((i0)/8) <= 32 + 4i0 - o0 }
+; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Char[32] : 16*floor((8 + i0)/16) > i0; Stmt_bb2[i0] -> MemRef_Char[0] : 16*floor((8 + i0)/16) <= i0 }
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Char[o0] : 4i0 <= o0 <= 3 + 4i0 };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Double[o0] : -1 + o0 + 8*floor((i0)/8) <= 16*floor((8 + i0)/16) <= o0 + 8*floor((i0)/8) }
+; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Double[o0] : 0 <= o0 <= 9 and ((o0 >= 8 and 16*floor((8 + i0)/16) > i0) or (o0 <= 1 and 16*floor((8 + i0)/16) <= i0)) }
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Double[i0] };
; CHECK-NEXT: }
Modified: polly/trunk/test/ScopInfo/multiple-types-non-affine.ll
URL: http://llvm.org/viewvc/llvm-project/polly/trunk/test/ScopInfo/multiple-types-non-affine.ll?rev=271534&r1=271533&r2=271534&view=diff
==============================================================================
--- polly/trunk/test/ScopInfo/multiple-types-non-affine.ll (original)
+++ polly/trunk/test/ScopInfo/multiple-types-non-affine.ll Thu Jun 2 11:57:12 2016
@@ -24,15 +24,15 @@
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: { Stmt_bb2[i0] -> [i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Short[o0] : -1 + o0 + 8*floor((i0)/8) <= 16*floor((8 + i0)/16) <= o0 + 8*floor((i0)/8) }
+; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Short[o0] : 0 <= o0 <= 9 and ((o0 >= 8 and 16*floor((8 + i0)/16) > i0) or (o0 <= 1 and 16*floor((8 + i0)/16) <= i0)) };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Short[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Float[o0] : -1 + o0 + 8*floor((i0)/8) <= 16*floor((8 + i0)/16) <= o0 + 8*floor((i0)/8) }
+; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Float[o0] : 0 <= o0 <= 9 and ((o0 >= 8 and 16*floor((8 + i0)/16) > i0) or (o0 <= 1 and 16*floor((8 + i0)/16) <= i0)) };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Float[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
-; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Double[o0] : -7 + o0 + 8*floor((i0)/8) <= 16*floor((8 + i0)/16) <= o0 + 8*floor((i0)/8) }
+; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Double[o0] : 0 <= o0 <= 15 and ((o0 >= 8 and 16*floor((8 + i0)/16) > i0) or (o0 <= 7 and 16*floor((8 + i0)/16) <= i0)) };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_bb2[i0] -> MemRef_Double[i0] };
; CHECK-NEXT: }
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