[PATCH] D20905: Only attempt to detect AVG if SSE2 is available

Dimitry Andric via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 2 05:47:17 PDT 2016


dim updated this revision to Diff 59368.
dim added a comment.

Add simplified test case from PR29973.


http://reviews.llvm.org/D20905

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/pr27973.ll

Index: test/CodeGen/X86/pr27973.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/pr27973.ll
@@ -0,0 +1,39 @@
+; REQUIRES: asserts
+; RUN: llc < %s
+
+target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
+target triple = "i386-apple-macosx10.11.0"
+
+; Function Attrs: norecurse nounwind ssp
+define void @fn1() #0 {
+entry:
+  br i1 undef, label %for.body4.preheader, label %for.cond.cleanup
+
+for.body4.preheader:                              ; preds = %entry
+  br label %vector.body
+
+vector.body:                                      ; preds = %vector.body, %for.body4.preheader
+  %0 = zext <16 x i8> zeroinitializer to <16 x i32>
+  %1 = add nuw nsw <16 x i32> %0, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
+  %2 = lshr <16 x i32> %1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
+  %3 = trunc <16 x i32> %2 to <16 x i8>
+  store <16 x i8> %3, <16 x i8>* undef, align 1, !tbaa !1, !alias.scope !4, !noalias !7
+  br label %vector.body
+
+for.cond.cleanup:                                 ; preds = %entry
+  ret void
+}
+
+attributes #0 = { norecurse nounwind ssp "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium3" "target-features"="+fxsr,+mmx,+sse,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.ident = !{!0}
+
+!0 = !{!"clang version 3.9.0 (trunk 271435)"}
+!1 = !{!2, !2, i64 0}
+!2 = !{!"omnipotent char", !3, i64 0}
+!3 = !{!"Simple C/C++ TBAA"}
+!4 = !{!5}
+!5 = distinct !{!5, !6}
+!6 = distinct !{!6, !"LVerDomain"}
+!7 = !{!8}
+!8 = distinct !{!8, !6}
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -27842,7 +27842,9 @@
   if (InScalarVT.getSizeInBits() <= ScalarVT.getSizeInBits())
     return SDValue();
 
-  if (Subtarget.hasAVX512()) {
+  if (!Subtarget.hasSSE2())
+    return SDValue();
+  else if (Subtarget.hasAVX512()) {
     if (VT.getSizeInBits() > 512)
       return SDValue();
   } else if (Subtarget.hasAVX2()) {


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