[llvm] r271508 - This adds support for Cortex-A73 as an available target.

Sjoerd Meijer via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 2 03:48:54 PDT 2016


Author: sjoerdmeijer
Date: Thu Jun  2 05:48:52 2016
New Revision: 271508

URL: http://llvm.org/viewvc/llvm-project?rev=271508&view=rev
Log:
This adds support for Cortex-A73 as an available target.

Differential Revision: http://reviews.llvm.org/D20865

Modified:
    llvm/trunk/include/llvm/Support/AArch64TargetParser.def
    llvm/trunk/include/llvm/Support/ARMTargetParser.def
    llvm/trunk/lib/Target/AArch64/AArch64.td
    llvm/trunk/lib/Target/ARM/ARM.td
    llvm/trunk/lib/Target/ARM/ARMSubtarget.h
    llvm/trunk/test/CodeGen/AArch64/cpus.ll
    llvm/trunk/test/CodeGen/AArch64/remat.ll
    llvm/trunk/test/CodeGen/ARM/build-attributes.ll

Modified: llvm/trunk/include/llvm/Support/AArch64TargetParser.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/AArch64TargetParser.def?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/AArch64TargetParser.def (original)
+++ llvm/trunk/include/llvm/Support/AArch64TargetParser.def Thu Jun  2 05:48:52 2016
@@ -52,6 +52,8 @@ AARCH64_CPU_NAME("cortex-a57", AK_ARMV8A
                 (AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
 AARCH64_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
                 (AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
+AARCH64_CPU_NAME("cortex-a73", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+                (AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
 AARCH64_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
                 (AArch64::AEK_SIMD | AArch64::AEK_CRYPTO))
 AARCH64_CPU_NAME("exynos-m1", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,

Modified: llvm/trunk/include/llvm/Support/ARMTargetParser.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ARMTargetParser.def?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ARMTargetParser.def (original)
+++ llvm/trunk/include/llvm/Support/ARMTargetParser.def Thu Jun  2 05:48:52 2016
@@ -220,6 +220,7 @@ ARM_CPU_NAME("cortex-a35", AK_ARMV8A, FK
 ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, ARM::AEK_CRC)
 ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
 ARM_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cortex-a73", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
 ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
 ARM_CPU_NAME("exynos-m1", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
 // Non-standard Arch names.

Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64.td Thu Jun  2 05:48:52 2016
@@ -150,8 +150,9 @@ def : ProcessorModel<"generic", NoSchedM
 def : ProcessorModel<"cortex-a35", CortexA53Model, [ProcA35]>;
 def : ProcessorModel<"cortex-a53", CortexA53Model, [ProcA53]>;
 def : ProcessorModel<"cortex-a57", CortexA57Model, [ProcA57]>;
-// FIXME: Cortex-A72 is currently modelled as an Cortex-A57.
+// FIXME: Cortex-A72 and Cortex-A73 are currently modelled as an Cortex-A57.
 def : ProcessorModel<"cortex-a72", CortexA57Model, [ProcA57]>;
+def : ProcessorModel<"cortex-a73", CortexA57Model, [ProcA57]>;
 def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
 def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>;
 def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>;

Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Thu Jun  2 05:48:52 2016
@@ -262,6 +262,8 @@ def ProcA57     : SubtargetFeature<"a57"
                                    "Cortex-A57 ARM processors", []>;
 def ProcA72     : SubtargetFeature<"a72", "ARMProcFamily", "CortexA72",
                                    "Cortex-A72 ARM processors", []>;
+def ProcA73     : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73",
+                                   "Cortex-A73 ARM processors", []>;
 
 def ProcKrait   : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
                                    "Qualcomm ARM processors", []>;
@@ -687,6 +689,13 @@ def : ProcNoItin<"cortex-a72",
                                                          FeatureHWDiv,
                                                          FeatureHWDivARM,
                                                          FeatureT2XtPk,
+                                                         FeatureCrypto,
+                                                         FeatureCRC]>;
+
+def : ProcNoItin<"cortex-a73",                          [ARMv8a, ProcA73,
+                                                         FeatureHWDiv,
+                                                         FeatureHWDivARM,
+                                                         FeatureT2XtPk,
                                                          FeatureCrypto,
                                                          FeatureCRC]>;
 

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Thu Jun  2 05:48:52 2016
@@ -44,7 +44,7 @@ protected:
   enum ARMProcFamilyEnum {
     Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
     CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexM3,
-    CortexA32, CortexA35, CortexA53, CortexA57, CortexA72,
+    CortexA32, CortexA35, CortexA53, CortexA57, CortexA72, CortexA73,
     Krait, Swift, ExynosM1
   };
   enum ARMProcClassEnum {

Modified: llvm/trunk/test/CodeGen/AArch64/cpus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cpus.ll?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/cpus.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/cpus.ll Thu Jun  2 05:48:52 2016
@@ -6,6 +6,7 @@
 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=kryo 2>&1 | FileCheck %s
 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID

Modified: llvm/trunk/test/CodeGen/AArch64/remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/remat.ll?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/remat.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/remat.ll Thu Jun  2 05:48:52 2016
@@ -2,6 +2,7 @@
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a57 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a53 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a72 -o - %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a73 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=exynos-m1 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=kryo -o - %s | FileCheck %s
 

Modified: llvm/trunk/test/CodeGen/ARM/build-attributes.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/build-attributes.ll?rev=271508&r1=271507&r2=271508&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/build-attributes.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/build-attributes.ll Thu Jun  2 05:48:52 2016
@@ -123,6 +123,7 @@
 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
+; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73
 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
@@ -1400,6 +1401,30 @@
 ; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
 ; CORTEX-A72-FAST:  .eabi_attribute 23, 1
 
+; CORTEX-A73:  .cpu cortex-a73
+; CORTEX-A73:  .eabi_attribute 6, 14
+; CORTEX-A73:  .eabi_attribute 7, 65
+; CORTEX-A73:  .eabi_attribute 8, 1
+; CORTEX-A73:  .eabi_attribute 9, 2
+; CORTEX-A73:  .fpu  crypto-neon-fp-armv8
+; CORTEX-A73:  .eabi_attribute 12, 3
+; CORTEX-A73-NOT: .eabi_attribute 19
+;; We default to IEEE 754 compliance
+; CORTEX-A73:  .eabi_attribute 20, 1
+; CORTEX-A73:  .eabi_attribute 21, 1
+; CORTEX-A73-NOT:  .eabi_attribute 22
+; CORTEX-A73:  .eabi_attribute 23, 3
+; CORTEX-A73:  .eabi_attribute 24, 1
+; CORTEX-A73:  .eabi_attribute 25, 1
+; CORTEX-A73-NOT: .eabi_attribute 27
+; CORTEX-A73-NOT: .eabi_attribute 28
+; CORTEX-A73:  .eabi_attribute 36, 1
+; CORTEX-A73:  .eabi_attribute 38, 1
+; CORTEX-A73:  .eabi_attribute 42, 1
+; CORTEX-A73-NOT: .eabi_attribute 44
+; CORTEX-A73:  .eabi_attribute 14, 0
+; CORTEX-A73:  .eabi_attribute 68, 3
+
 ; EXYNOS-M1:  .cpu exynos-m1
 ; EXYNOS-M1:  .eabi_attribute 6, 14
 ; EXYNOS-M1:  .eabi_attribute 7, 65




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