[llvm] r271386 - Adding back-end support to two bit scanning intrinsics

Michael Zuckerman via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 1 05:20:45 PDT 2016


Author: mzuckerm
Date: Wed Jun  1 07:02:37 2016
New Revision: 271386

URL: http://llvm.org/viewvc/llvm-project?rev=271386&view=rev
Log:
Adding back-end support to two bit scanning intrinsics

Adding LLVM back-end support to two intrinsics dealing with bit scan: _bit_scan_forward and _bit_scan_reverse.
Their functionality is as described in Intel intrinsics guide:
https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bit_scan_forward&expand=371,370
https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bit_scan_reverse&expand=371,370

Commit on behalf of Omer Paparo Bivas


Differential Revision: http://reviews.llvm.org/D19915


Added:
    llvm/trunk/test/CodeGen/X86/bitscan.ll
Modified:
    llvm/trunk/include/llvm/IR/IntrinsicsX86.td
    llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h

Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=271386&r1=271385&r2=271386&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Wed Jun  1 07:02:37 2016
@@ -8442,3 +8442,13 @@ let TargetPrefix = "x86" in {
       : GCCBuiltin<"__builtin_ia32_mwaitx">,
         Intrinsic<[], [ llvm_i32_ty, llvm_i32_ty, llvm_i32_ty ], []>;
 }
+
+//===----------------------------------------------------------------------===//
+// Bit Scan intrinsics
+let TargetPrefix = "x86" in {
+  def int_x86_bit_scan_forward_32 : GCCBuiltin<"__builtin_ia32_bit_scan_forward">,
+      Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
+   
+  def int_x86_bit_scan_reverse_32 : GCCBuiltin<"__builtin_ia32_bit_scan_reverse">,
+      Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
+}

Modified: llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=271386&r1=271385&r2=271386&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h Wed Jun  1 07:02:37 2016
@@ -2133,6 +2133,8 @@ static const IntrinsicData  IntrinsicsWi
                      X86ISD::SCALAR_FP_TO_UINT_RND, 0),
   X86_INTRINSIC_DATA(avx512_vcvtss2usi64, INTR_TYPE_2OP,
                      X86ISD::SCALAR_FP_TO_UINT_RND, 0),
+  X86_INTRINSIC_DATA(bit_scan_forward_32,  INTR_TYPE_1OP, X86ISD::BSF, 0),
+  X86_INTRINSIC_DATA(bit_scan_reverse_32,  INTR_TYPE_1OP, X86ISD::BSR, 0),
   X86_INTRINSIC_DATA(fma_vfmadd_pd,        INTR_TYPE_3OP, X86ISD::FMADD, 0),
   X86_INTRINSIC_DATA(fma_vfmadd_pd_256,    INTR_TYPE_3OP, X86ISD::FMADD, 0),
   X86_INTRINSIC_DATA(fma_vfmadd_ps,        INTR_TYPE_3OP, X86ISD::FMADD, 0),

Added: llvm/trunk/test/CodeGen/X86/bitscan.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitscan.ll?rev=271386&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitscan.ll (added)
+++ llvm/trunk/test/CodeGen/X86/bitscan.ll Wed Jun  1 07:02:37 2016
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=64-BIT
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=32-BIT
+declare i32 @llvm.x86.bit.scan.forward.32(i32 %val)
+declare i32 @llvm.x86.bit.scan.reverse.32(i32 %val)
+
+define i32 @test_bsf(i32 %val) {
+  %call = call i32 @llvm.x86.bit.scan.forward.32(i32 %val)
+  ret i32 %call
+
+; ALL-LABEL: test_bsf:
+; 64-BIT:    bsfl %edi, %eax
+; 32-BIT:    bsfl 4(%esp), %eax
+}
+
+define i32 @test_bsr(i32 %val) {
+  %call = call i32 @llvm.x86.bit.scan.reverse.32(i32 %val)
+  ret i32 %call
+
+; ALL-LABEL: test_bsr:
+; 64-BIT:    bsrl %edi, %eax
+; 32-BIT:    bsrl 4(%esp), %eax
+}
+




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