[PATCH] D19661: [X86] Also try to zero elts when lowering v32i8 shuffle with PSHUFB.

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

Minor comments but my previous LGTM still stands!


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:7189
@@ +7188,3 @@
+  const int NumBytes = VT.is128BitVector() ? 16 : 32;
+  const int NumEltBytes = VT.getVectorElementType().getSizeInBits() / 8;
+
----------------
const int NumEltBytes = VT.getScalarSizeInBits() / 8;

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:7196
@@ +7195,3 @@
+  (void)Subtarget;
+
+  SmallVector<int, 32> ZeroableMask(Mask.begin(), Mask.end());
----------------
Can't we just pass Subtarget as an argument like we do in other cases?

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:7205
@@ +7204,3 @@
+  SmallVector<SDValue, 32> PSHUFBMask(NumBytes);
+  // Higher bit sets in i8 mask means zero element.
+  SDValue ZeroMask = DAG.getConstant(0x80, DL, MVT::i8);
----------------
Rephrase 'Sign bit set in i8 mask means zero element'?


http://reviews.llvm.org/D19661