[PATCH] D20698: [ARM] Transform LDMs into writeback form to save code size

[James Molloy via llvm-commits]

jmolloy created this revision.
jmolloy added reviewers: mcrosier, t.p.northover.
jmolloy added a subscriber: llvm-commits.
jmolloy set the repository for this revision to rL LLVM.
Herald added subscribers: rengolin, aemerson.

If we have an LDM that uses only low registers and doesn't write to its base register:

      ldm.w r0, {r1, r2, r3}

And that base register is dead after the LDM, then we can convert it to writeback form and use a narrow encoding:

      ldm.n r0!, {r1, r2, r3}

Obviously, this introduces a new register write and so can cause WAW hazards, so I've enabled it only in minsize mode. This is a code size trick that ARM Compiler 5 ("armcc") does that we don't.

Repository:
  rL LLVM

http://reviews.llvm.org/D20698

Files:
  lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  test/CodeGen/ARM/ldm-base-writeback.ll

Index: test/CodeGen/ARM/ldm-base-writeback.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/ldm-base-writeback.ll
@@ -0,0 +1,21 @@
+; RUN: llc -O3 < %s | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
+target triple = "armv7--linux-gnu"
+
+ at a = global i32 0, align 4
+ at b = global i32 0, align 4
+ at c = global i32 0, align 4
+
+; CHECK-LABEL: bar:
+; CHECK: ldm r{{[0-9]}}!, {r0, r{{[0-9]}}, r{{[0-9]}}}
+define void @bar(i32 %a1, i32 %b1, i32 %c1) minsize optsize {
+  %1 = load i32, i32* @a, align 4
+  %2 = load i32, i32* @b, align 4
+  %3 = load i32, i32* @c, align 4
+  %4 = tail call i32 @baz(i32 %1, i32 %3) minsize optsize
+  %5 = tail call i32 @baz(i32 %2, i32 %3) minsize optsize
+  ret void
+}
+
+declare i32 @baz(i32,i32) minsize optsize
Index: lib/Target/ARM/ARMLoadStoreOptimizer.cpp
===================================================================
--- lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1229,10 +1229,28 @@
   } else {
     MergeInstr = findIncDecAfter(MBBI, Base, Pred, PredReg, Offset);
     if (((Mode != ARM_AM::ia && Mode != ARM_AM::ib) || Offset != Bytes) &&
-        ((Mode != ARM_AM::da && Mode != ARM_AM::db) || Offset != -Bytes))
-      return false;
+        ((Mode != ARM_AM::da && Mode != ARM_AM::db) || Offset != -Bytes)) {
+
+      // We couldn't find an inc/dec to merge. But if the base is dead, we
+      // can still change to a writeback form as that will save us 2 bytes
+      // of code size. It can create WAW hazards though, so only do it if
+      // we're minimizing code size.
+      bool HighRegsUsed = false;
+      for (unsigned i = 2, e = MI->getNumOperands(); i != e; ++i)
+        if (MI->getOperand(i).getReg() >= ARM::R8) {
+          HighRegsUsed = true;
+          break;
+        }
+
+      if (BaseKill && MBB.getParent()->getFunction()->optForMinSize() &&
+          !HighRegsUsed)
+        MergeInstr = MBB.end();
+      else
+        return false;
+    }
   }
-  MBB.erase(MergeInstr);
+  if (MergeInstr != MBB.end())
+    MBB.erase(MergeInstr);
 
   unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode);
   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc))


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D20698.58670.patch
Type: text/x-patch
Size: 2305 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160526/a89b0def/attachment.bin>