[llvm] r270843 - [AVX512] Fix intrinsic cmp{sd|ss} lowering.
Igor Breger via llvm-commits
llvm-commits at lists.llvm.org
Thu May 26 05:42:28 PDT 2016
Author: ibreger
Date: Thu May 26 07:42:25 2016
New Revision: 270843
URL: http://llvm.org/viewvc/llvm-project?rev=270843&view=rev
Log:
[AVX512] Fix intrinsic cmp{sd|ss} lowering.
Differential Revision: http://reviews.llvm.org/D20615
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=270843&r1=270842&r2=270843&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu May 26 07:42:25 2016
@@ -17455,9 +17455,7 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S
MVT::i1),
Subtarget, DAG);
- return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i8,
- DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i8, CmpMask),
- DAG.getValueType(MVT::i1));
+ return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i8, CmpMask);
}
case COMI: { // Comparison intrinsics
ISD::CondCode CC = (ISD::CondCode)IntrData->Opc1;
Modified: llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=270843&r1=270842&r2=270843&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll Thu May 26 07:42:25 2016
@@ -5659,8 +5659,7 @@ define i8 at test_int_x86_avx512_mask_cmp_s
; CHECK-NEXT: kmovw %edi, %k1
; CHECK-NEXT: vcmpnltsd {sae}, %xmm1, %xmm0, %k0 {%k1}
; CHECK-NEXT: kmovw %k0, %eax
-; CHECK-NEXT: shlb $7, %al
-; CHECK-NEXT: sarb $7, %al
+; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: retq
%res4 = call i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double> %x0, <2 x double> %x1, i32 5, i8 %x3, i32 8)
@@ -5681,8 +5680,7 @@ define i8 at test_int_x86_avx512_mask_cmp_s
; CHECK-NEXT: kandw %k2, %k1, %k1
; CHECK-NEXT: korw %k1, %k0, %k0
; CHECK-NEXT: kmovw %k0, %eax
-; CHECK-NEXT: shlb $7, %al
-; CHECK-NEXT: sarb $7, %al
+; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: retq
%res1 = call i8 @llvm.x86.avx512.mask.cmp.sd(<2 x double> %x0, <2 x double> %x1, i32 2, i8 -1, i32 4)
@@ -5705,8 +5703,7 @@ define i8 at test_int_x86_avx512_mask_cmp_s
; CHECK-NEXT: kmovw %edi, %k1
; CHECK-NEXT: vcmpunordss %xmm1, %xmm0, %k0 {%k1}
; CHECK-NEXT: kmovw %k0, %eax
-; CHECK-NEXT: shlb $7, %al
-; CHECK-NEXT: sarb $7, %al
+; CHECK-NEXT: andl $1, %eax
; CHECK-NEXT: retq
%res2 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 3, i8 %x3, i32 4)
@@ -5719,15 +5716,16 @@ define i8 at test_int_x86_avx512_mask_cmp_s
; CHECK: ## BB#0:
; CHECK-NEXT: vcmpless %xmm1, %xmm0, %k1
; CHECK-NEXT: vcmpunordss {sae}, %xmm1, %xmm0, %k0 {%k1}
-; CHECK-NEXT: vcmpneqss %xmm1, %xmm0, %k1
-; CHECK-NEXT: vcmpnltss {sae}, %xmm1, %xmm0, %k1 {%k1}
; CHECK-NEXT: andl $1, %edi
-; CHECK-NEXT: kmovw %edi, %k2
-; CHECK-NEXT: kandw %k2, %k1, %k1
-; CHECK-NEXT: kandw %k1, %k0, %k0
+; CHECK-NEXT: kmovw %edi, %k1
+; CHECK-NEXT: vcmpneqss %xmm1, %xmm0, %k2 {%k1}
+; CHECK-NEXT: kmovw %k2, %ecx
+; CHECK-NEXT: vcmpnltss {sae}, %xmm1, %xmm0, %k1 {%k1}
+; CHECK-NEXT: kmovw %k1, %edx
+; CHECK-NEXT: andl $1, %edx
; CHECK-NEXT: kmovw %k0, %eax
-; CHECK-NEXT: shlb $7, %al
-; CHECK-NEXT: sarb $7, %al
+; CHECK-NEXT: andb %cl, %al
+; CHECK-NEXT: andb %dl, %al
; CHECK-NEXT: retq
%res1 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 2, i8 -1, i32 4)
%res2 = call i8 @llvm.x86.avx512.mask.cmp.ss(<4 x float> %x0, <4 x float> %x1, i32 3, i8 -1, i32 8)
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