[llvm] r270819 - [X86] Add the AVX storeu intrinsics to InstCombine and LoopStrengthReduce in the same places that the SSE/SSE2 storeu intrinsics appear.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed May 25 21:28:47 PDT 2016


Author: ctopper
Date: Wed May 25 23:28:45 2016
New Revision: 270819

URL: http://llvm.org/viewvc/llvm-project?rev=270819&view=rev
Log:
[X86] Add the AVX storeu intrinsics to InstCombine and LoopStrengthReduce in the same places that the SSE/SSE2 storeu intrinsics appear.

I don't really know how to test this. Just seemed like we should be consistent.

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp?rev=270819&r1=270818&r2=270819&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp Wed May 25 23:28:45 2016
@@ -1428,6 +1428,19 @@ Instruction *InstCombiner::visitCallInst
     }
     break;
 
+  case Intrinsic::x86_avx_storeu_ps_256:
+  case Intrinsic::x86_avx_storeu_pd_256:
+  case Intrinsic::x86_avx_storeu_dq_256:
+    // Turn X86 storeu -> store if the pointer is known aligned.
+    if (getOrEnforceKnownAlignment(II->getArgOperand(0), 32, DL, II, AC, DT) >=
+        32) {
+      Type *OpPtrTy =
+        PointerType::getUnqual(II->getArgOperand(1)->getType());
+      Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0), OpPtrTy);
+      return new StoreInst(II->getArgOperand(1), Ptr);
+    }
+    break;
+
   case Intrinsic::x86_vcvtph2ps_128:
   case Intrinsic::x86_vcvtph2ps_256: {
     auto Arg = II->getArgOperand(0);

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=270819&r1=270818&r2=270819&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed May 25 23:28:45 2016
@@ -687,6 +687,9 @@ static bool isAddressUse(Instruction *In
       case Intrinsic::x86_sse_storeu_ps:
       case Intrinsic::x86_sse2_storeu_pd:
       case Intrinsic::x86_sse2_storeu_dq:
+      case Intrinsic::x86_avx_storeu_ps_256:
+      case Intrinsic::x86_avx_storeu_pd_256:
+      case Intrinsic::x86_avx_storeu_dq_256:
         if (II->getArgOperand(0) == OperandVal)
           isAddress = true;
         break;
@@ -711,6 +714,9 @@ static MemAccessTy getAccessType(const I
     case Intrinsic::x86_sse_storeu_ps:
     case Intrinsic::x86_sse2_storeu_pd:
     case Intrinsic::x86_sse2_storeu_dq:
+    case Intrinsic::x86_avx_storeu_ps_256:
+    case Intrinsic::x86_avx_storeu_pd_256:
+    case Intrinsic::x86_avx_storeu_dq_256:
       AccessTy.MemTy = II->getArgOperand(0)->getType();
       break;
     }




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