[PATCH] D20644: [NVPTX] Added NVVMIntrRange pass

[Artem Belevich via llvm-commits]

tra marked 6 inline comments as done.
tra added a comment.

In http://reviews.llvm.org/D20644#440055, @jingyue wrote:

> Have you considered letting Clang (instead of a late-stage IR pass) add these ranges? These ranges are useful for some target-independent IR passes, e.g. those using ValueTracking (http://reviews.llvm.org/D4150).


This pass runs at the very beginning of optimization pipeline. Justin created hook for early target-specific passes in http://reviews.llvm.org/D18616.


================
Comment at: lib/Target/NVPTX/NVVMIntrRange.cpp:37
@@ +36,3 @@
+   } block, grid;
+
+ public:
----------------
I've made names more descriptive. IMO struct fits quite well for describing dimensions/indexes of 3d grid.

================
Comment at: test/CodeGen/NVPTX/intrinsic-old.ll:10-11
@@ -4,3 +9,4 @@
 define ptx_device i32 @test_tid_x() {
 ; CHECK: mov.u32 %r{{[0-9]+}}, %tid.x;
+; RANGE: call i32 @llvm.ptx.read.tid.x(), !range ![[BLK_IDX_XY:[0-9]+]]
 ; CHECK: ret;
----------------
Having -LABEL does not matter much in this case as each function checks for its own unique register and that applies to both CHECK and RANGE.


================
Comment at: test/CodeGen/NVPTX/intrinsic-old.ll:314
@@ +313,2 @@
+; RANGE-DAG: ![[GRID_SIZE_YZ]] = !{i32 1, i32 65536}
+
----------------
ptx.read.* and nvvm.read.ptx.sreg.* appear to have diverged.
There's no llvm.ptx.read.warpsize, so it's not in this file.
We apparently don't test nvvm.read.ptx.sreg.* intrinsics much, either.

I can add a range test for nvvm.read.ptx.sreg.warpsize to this patch, but it looks like there's enough work for  a separate patch.




http://reviews.llvm.org/D20644