[llvm] r262115 - CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
Duncan P. N. Exon Smith via llvm-commits
llvm-commits at lists.llvm.org
Sat May 21 12:48:29 PDT 2016
> On 2016-May-21, at 09:12, Hal Finkel <hfinkel at anl.gov> wrote:
>
> ----- Original Message -----
>> From: "Duncan P. N. Exon Smith via llvm-commits" <llvm-commits at lists.llvm.org>
>> To: llvm-commits at lists.llvm.org
>> Sent: Saturday, February 27, 2016 12:40:41 AM
>> Subject: [llvm] r262115 - CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
>>
>> Author: dexonsmith
>> Date: Sat Feb 27 00:40:41 2016
>> New Revision: 262115
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=262115&view=rev
>> Log:
>> CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
>>
>> Take MachineInstr by reference instead of by pointer in SlotIndexes
>> and
>> the SlotIndex wrappers in LiveIntervals. The MachineInstrs here are
>> never null, so this cleans up the API a bit. It also incidentally
>> removes a few implicit conversions from MachineInstrBundleIterator to
>> MachineInstr* (see PR26753).
>>
>> At a couple of call sites it was convenient to convert to a
>> range-based
>> for loop over MachineBasicBlock::instr_begin/instr_end, so I added
>> MachineBasicBlock::instrs.
>>
>> Modified:
>> llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
>> llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
>> llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
>> llvm/trunk/lib/CodeGen/InlineSpiller.cpp
>> llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
>> llvm/trunk/lib/CodeGen/LiveInterval.cpp
>> llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
>> llvm/trunk/lib/CodeGen/LiveRangeCalc.cpp
>> llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
>> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
>> llvm/trunk/lib/CodeGen/MachineScheduler.cpp
>> llvm/trunk/lib/CodeGen/MachineVerifier.cpp
>> llvm/trunk/lib/CodeGen/PHIElimination.cpp
>> llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
>> llvm/trunk/lib/CodeGen/RegisterPressure.cpp
>> llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
>> llvm/trunk/lib/CodeGen/SlotIndexes.cpp
>> llvm/trunk/lib/CodeGen/SplitKit.cpp
>> llvm/trunk/lib/CodeGen/StackColoring.cpp
>> llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
>> llvm/trunk/lib/CodeGen/VirtRegMap.cpp
>> llvm/trunk/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
>> llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
>> llvm/trunk/lib/Target/AMDGPU/SIMachineScheduler.cpp
>> llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
>> llvm/trunk/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
>>
>> Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=262115&r1=262114&r2=262115&view=diff
>> ==============================================================================
>> --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original)
>> +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Sat Feb 27
>> 00:40:41 2016
>> @@ -145,7 +145,7 @@ extern cl::opt<bool> UseSegmentSetForPhy
>> /// Given a register and an instruction, adds a live segment
>> from that
>> /// instruction to the end of its MBB.
>> LiveInterval::Segment addSegmentToEndOfBlock(unsigned reg,
>> - MachineInstr*
>> startInst);
>> + MachineInstr
>> &startInst);
>>
>> /// After removing some uses of a register, shrink its live
>> range to just
>> /// the remaining uses. This method does not compute reaching
>> defs for new
>> @@ -195,13 +195,13 @@ extern cl::opt<bool> UseSegmentSetForPhy
>>
>> /// isNotInMIMap - returns true if the specified machine instr
>> has been
>> /// removed or was never entered in the map.
>> - bool isNotInMIMap(const MachineInstr* Instr) const {
>> + bool isNotInMIMap(const MachineInstr &Instr) const {
>> return !Indexes->hasIndex(Instr);
>> }
>>
>> /// Returns the base index of the given instruction.
>> - SlotIndex getInstructionIndex(const MachineInstr *instr) const {
>> - return Indexes->getInstructionIndex(instr);
>> + SlotIndex getInstructionIndex(const MachineInstr &Instr) const {
>> + return Indexes->getInstructionIndex(Instr);
>> }
>>
>> /// Returns the instruction associated with the given index.
>> @@ -240,21 +240,21 @@ extern cl::opt<bool> UseSegmentSetForPhy
>> RegMaskBlocks.push_back(std::make_pair(RegMaskSlots.size(),
>> 0));
>> }
>>
>> - SlotIndex InsertMachineInstrInMaps(MachineInstr *MI) {
>> + SlotIndex InsertMachineInstrInMaps(MachineInstr &MI) {
>> return Indexes->insertMachineInstrInMaps(MI);
>> }
>>
>> void InsertMachineInstrRangeInMaps(MachineBasicBlock::iterator
>> B,
>> MachineBasicBlock::iterator
>> E) {
>> for (MachineBasicBlock::iterator I = B; I != E; ++I)
>> - Indexes->insertMachineInstrInMaps(I);
>> + Indexes->insertMachineInstrInMaps(*I);
>> }
>>
>> - void RemoveMachineInstrFromMaps(MachineInstr *MI) {
>> + void RemoveMachineInstrFromMaps(MachineInstr &MI) {
>> Indexes->removeMachineInstrFromMaps(MI);
>> }
>>
>> - void ReplaceMachineInstrInMaps(MachineInstr *MI, MachineInstr
>> *NewMI) {
>> + void ReplaceMachineInstrInMaps(MachineInstr &MI, MachineInstr
>> &NewMI) {
>> Indexes->replaceMachineInstrInMaps(MI, NewMI);
>> }
>>
>>
>> Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=262115&r1=262114&r2=262115&view=diff
>> ==============================================================================
>> --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original)
>> +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Sat Feb 27
>> 00:40:41 2016
>> @@ -15,6 +15,7 @@
>> #define LLVM_CODEGEN_MACHINEBASICBLOCK_H
>>
>> #include "llvm/ADT/GraphTraits.h"
>> +#include "llvm/ADT/iterator_range.h"
>> #include "llvm/CodeGen/MachineInstrBundleIterator.h"
>> #include "llvm/CodeGen/MachineInstr.h"
>> #include "llvm/Support/BranchProbability.h"
>> @@ -192,6 +193,13 @@ public:
>> reverse_instr_iterator instr_rend () { return
>> Insts.rend(); }
>> const_reverse_instr_iterator instr_rend () const { return
>> Insts.rend(); }
>>
>> + typedef iterator_range<instr_iterator> instr_range;
>> + typedef iterator_range<const_instr_iterator> const_instr_range;
>> + instr_range instrs() { return instr_range(instr_begin(),
>> instr_end()); }
>> + const_instr_range instrs() const {
>> + return const_instr_range(instr_begin(), instr_end());
>> + }
>> +
>> iterator begin() { return instr_begin(); }
>> const_iterator begin() const { return instr_begin(); }
>> iterator end () { return instr_end(); }
>>
>> Modified: llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SlotIndexes.h?rev=262115&r1=262114&r2=262115&view=diff
>> ==============================================================================
>> --- llvm/trunk/include/llvm/CodeGen/SlotIndexes.h (original)
>> +++ llvm/trunk/include/llvm/CodeGen/SlotIndexes.h Sat Feb 27 00:40:41
>> 2016
>> @@ -414,14 +414,14 @@ namespace llvm {
>>
>> /// Returns true if the given machine instr is mapped to an
>> index,
>> /// otherwise returns false.
>> - bool hasIndex(const MachineInstr *instr) const {
>> - return mi2iMap.count(instr);
>> + bool hasIndex(const MachineInstr &instr) const {
>> + return mi2iMap.count(&instr);
>> }
>>
>> /// Returns the base index for the given instruction.
>> - SlotIndex getInstructionIndex(const MachineInstr *MI) const {
>> + SlotIndex getInstructionIndex(const MachineInstr &MI) const {
>> // Instructions inside a bundle have the same number as the
>> bundle itself.
>> - Mi2IndexMap::const_iterator itr =
>> mi2iMap.find(getBundleStart(MI));
>> + Mi2IndexMap::const_iterator itr =
>> mi2iMap.find(getBundleStart(&MI));
>> assert(itr != mi2iMap.end() && "Instruction not found in
>> maps.");
>> return itr->second;
>> }
>> @@ -447,8 +447,8 @@ namespace llvm {
>> /// getIndexBefore - Returns the index of the last indexed
>> instruction
>> /// before MI, or the start index of its basic block.
>> /// MI is not required to have an index.
>> - SlotIndex getIndexBefore(const MachineInstr *MI) const {
>> - const MachineBasicBlock *MBB = MI->getParent();
>> + SlotIndex getIndexBefore(const MachineInstr &MI) const {
>> + const MachineBasicBlock *MBB = MI.getParent();
>> assert(MBB && "MI must be inserted inna basic block");
>> MachineBasicBlock::const_iterator I = MI, B = MBB->begin();
>> for (;;) {
>> @@ -464,8 +464,8 @@ namespace llvm {
>> /// getIndexAfter - Returns the index of the first indexed
>> instruction
>> /// after MI, or the end index of its basic block.
>> /// MI is not required to have an index.
>> - SlotIndex getIndexAfter(const MachineInstr *MI) const {
>> - const MachineBasicBlock *MBB = MI->getParent();
>> + SlotIndex getIndexAfter(const MachineInstr &MI) const {
>> + const MachineBasicBlock *MBB = MI.getParent();
>> assert(MBB && "MI must be inserted inna basic block");
>> MachineBasicBlock::const_iterator I = MI, E = MBB->end();
>> for (;;) {
>> @@ -577,25 +577,25 @@ namespace llvm {
>> /// If Late is set and there are null indexes between mi's
>> neighboring
>> /// instructions, create the new index after the null indexes
>> instead of
>> /// before them.
>> - SlotIndex insertMachineInstrInMaps(MachineInstr *mi, bool Late =
>> false) {
>> - assert(!mi->isInsideBundle() &&
>> + SlotIndex insertMachineInstrInMaps(MachineInstr &MI, bool Late =
>> false) {
>> + assert(!MI.isInsideBundle() &&
>> "Instructions inside bundles should use bundle start's
>> slot.");
>> - assert(mi2iMap.find(mi) == mi2iMap.end() && "Instr already
>> indexed.");
>> + assert(mi2iMap.find(&MI) == mi2iMap.end() && "Instr already
>> indexed.");
>> // Numbering DBG_VALUE instructions could cause code
>> generation to be
>> // affected by debug information.
>> - assert(!mi->isDebugValue() && "Cannot number DBG_VALUE
>> instructions.");
>> + assert(!MI.isDebugValue() && "Cannot number DBG_VALUE
>> instructions.");
>>
>> - assert(mi->getParent() != nullptr && "Instr must be added to
>> function.");
>> + assert(MI.getParent() != nullptr && "Instr must be added to
>> function.");
>>
>> - // Get the entries where mi should be inserted.
>> + // Get the entries where MI should be inserted.
>> IndexList::iterator prevItr, nextItr;
>> if (Late) {
>> - // Insert mi's index immediately before the following
>> instruction.
>> - nextItr = getIndexAfter(mi).listEntry()->getIterator();
>> + // Insert MI's index immediately before the following
>> instruction.
>> + nextItr = getIndexAfter(MI).listEntry()->getIterator();
>> prevItr = std::prev(nextItr);
>> } else {
>> - // Insert mi's index immediately after the preceding
>> instruction.
>> - prevItr = getIndexBefore(mi).listEntry()->getIterator();
>> + // Insert MI's index immediately after the preceding
>> instruction.
>> + prevItr = getIndexBefore(MI).listEntry()->getIterator();
>> nextItr = std::next(prevItr);
>> }
>>
>> @@ -604,27 +604,27 @@ namespace llvm {
>> unsigned dist = ((nextItr->getIndex() -
>> prevItr->getIndex())/2) & ~3u;
>> unsigned newNumber = prevItr->getIndex() + dist;
>>
>> - // Insert a new list entry for mi.
>> + // Insert a new list entry for MI.
>> IndexList::iterator newItr =
>> - indexList.insert(nextItr, createEntry(mi, newNumber));
>> + indexList.insert(nextItr, createEntry(&MI, newNumber));
>>
>> // Renumber locally if we need to.
>> if (dist == 0)
>> renumberIndexes(newItr);
>>
>> SlotIndex newIndex(&*newItr, SlotIndex::Slot_Block);
>> - mi2iMap.insert(std::make_pair(mi, newIndex));
>> + mi2iMap.insert(std::make_pair(&MI, newIndex));
>> return newIndex;
>> }
>>
>> /// Remove the given machine instruction from the mapping.
>> - void removeMachineInstrFromMaps(MachineInstr *mi) {
>> + void removeMachineInstrFromMaps(MachineInstr &MI) {
>> // remove index -> MachineInstr and
>> // MachineInstr -> index mappings
>> - Mi2IndexMap::iterator mi2iItr = mi2iMap.find(mi);
>> + Mi2IndexMap::iterator mi2iItr = mi2iMap.find(&MI);
>> if (mi2iItr != mi2iMap.end()) {
>> IndexListEntry *miEntry(mi2iItr->second.listEntry());
>> - assert(miEntry->getInstr() == mi && "Instruction indexes
>> broken.");
>> + assert(miEntry->getInstr() == &MI && "Instruction indexes
>> broken.");
>> // FIXME: Eventually we want to actually delete these
>> indexes.
>> miEntry->setInstr(nullptr);
>> mi2iMap.erase(mi2iItr);
>> @@ -633,17 +633,17 @@ namespace llvm {
>>
>> /// ReplaceMachineInstrInMaps - Replacing a machine instr with a
>> new one in
>> /// maps used by register allocator.
>> - void replaceMachineInstrInMaps(MachineInstr *mi, MachineInstr
>> *newMI) {
>> - Mi2IndexMap::iterator mi2iItr = mi2iMap.find(mi);
>> + void replaceMachineInstrInMaps(MachineInstr &MI, MachineInstr
>> &NewMI) {
>> + Mi2IndexMap::iterator mi2iItr = mi2iMap.find(&MI);
>> if (mi2iItr == mi2iMap.end())
>> return;
>> SlotIndex replaceBaseIndex = mi2iItr->second;
>> IndexListEntry *miEntry(replaceBaseIndex.listEntry());
>> - assert(miEntry->getInstr() == mi &&
>> + assert(miEntry->getInstr() == &MI &&
>> "Mismatched instruction in index tables.");
>> - miEntry->setInstr(newMI);
>> + miEntry->setInstr(&NewMI);
>> mi2iMap.erase(mi2iItr);
>> - mi2iMap.insert(std::make_pair(newMI, replaceBaseIndex));
>> + mi2iMap.insert(std::make_pair(&NewMI, replaceBaseIndex));
>> }
>>
>> /// Add the given MachineBasicBlock into the maps.
>>
>> Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=262115&r1=262114&r2=262115&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Sat Feb 27 00:40:41 2016
>> @@ -165,7 +165,7 @@ private:
>> void propagateSiblingValue(SibValueMap::iterator, VNInfo *VNI =
>> nullptr);
>> void analyzeSiblingValues();
>>
>> - bool hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI);
>> + bool hoistSpill(LiveInterval &SpillLI, MachineInstr &CopyMI);
>> void eliminateRedundantSpills(LiveInterval &LI, VNInfo *VNI);
>>
>> void markValueUsed(LiveInterval*, VNInfo*);
>> @@ -681,7 +681,7 @@ void InlineSpiller::analyzeSiblingValues
>>
>> /// hoistSpill - Given a sibling copy that defines a value to be
>> spilled, insert
>> /// a spill at a better location.
>> -bool InlineSpiller::hoistSpill(LiveInterval &SpillLI, MachineInstr
>> *CopyMI) {
>> +bool InlineSpiller::hoistSpill(LiveInterval &SpillLI, MachineInstr
>> &CopyMI) {
>> SlotIndex Idx = LIS.getInstructionIndex(CopyMI);
>> VNInfo *VNI = SpillLI.getVNInfoAt(Idx.getRegSlot());
>> assert(VNI && VNI->def == Idx.getRegSlot() && "Not defined by
>> copy");
>> @@ -743,7 +743,7 @@ bool InlineSpiller::hoistSpill(LiveInter
>> TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot,
>> MRI.getRegClass(SVI.SpillReg), &TRI);
>> --MII; // Point to store instruction.
>> - LIS.InsertMachineInstrInMaps(MII);
>> + LIS.InsertMachineInstrInMaps(*MII);
>> DEBUG(dbgs() << "\thoisted: " << SVI.SpillVNI->def << '\t' <<
>> *MII);
>>
>> ++NumSpills;
>> @@ -781,7 +781,7 @@ void InlineSpiller::eliminateRedundantSp
>> MachineInstr *MI = &*(UI++);
>> if (!MI->isCopy() && !MI->mayStore())
>> continue;
>> - SlotIndex Idx = LIS.getInstructionIndex(MI);
>> + SlotIndex Idx = LIS.getInstructionIndex(*MI);
>> if (LI->getVNInfoAt(Idx) != VNI)
>> continue;
>>
>> @@ -860,7 +860,7 @@ bool InlineSpiller::reMaterializeFor(Liv
>> if (!RI.Reads)
>> return false;
>>
>> - SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true);
>> + SlotIndex UseIdx = LIS.getInstructionIndex(*MI).getRegSlot(true);
>> VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex());
>>
>> if (!ParentVNI) {
>> @@ -1019,7 +1019,7 @@ bool InlineSpiller::coalesceStackAccess(
>> return false;
>>
>> DEBUG(dbgs() << "Coalescing stack access: " << *MI);
>> - LIS.RemoveMachineInstrFromMaps(MI);
>> + LIS.RemoveMachineInstrFromMaps(*MI);
>> MI->eraseFromParent();
>>
>> if (IsLoad) {
>> @@ -1051,7 +1051,7 @@ static void dumpMachineInstrRangeWithSlo
>> dbgs() << '\t' << header << ": " << NextLine;
>>
>> for (MachineBasicBlock::iterator I = B; I != E; ++I) {
>> - SlotIndex Idx = LIS.getInstructionIndex(I).getRegSlot();
>> + SlotIndex Idx = LIS.getInstructionIndex(*I).getRegSlot();
>>
>> // If a register was passed in and this instruction has it as a
>> // destination that is marked as an early clobber, print the
>> @@ -1138,18 +1138,18 @@ foldMemoryOperand(ArrayRef<std::pair<Mac
>> continue;
>> // FoldMI does not define this physreg. Remove the LI segment.
>> assert(MO->isDead() && "Cannot fold physreg def");
>> - SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot();
>> + SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot();
>> LIS.removePhysRegDefAt(Reg, Idx);
>> }
>>
>> - LIS.ReplaceMachineInstrInMaps(MI, FoldMI);
>> + LIS.ReplaceMachineInstrInMaps(*MI, *FoldMI);
>> MI->eraseFromParent();
>>
>> // Insert any new instructions other than FoldMI into the LIS
>> maps.
>> assert(!MIS.empty() && "Unexpected empty span of instructions!");
>> for (MachineInstr &MI : MIS)
>> if (&MI != FoldMI)
>> - LIS.InsertMachineInstrInMaps(&MI);
>> + LIS.InsertMachineInstrInMaps(MI);
>>
>> // TII.foldMemoryOperand may have left some implicit operands on
>> the
>> // instruction. Strip them.
>> @@ -1252,7 +1252,7 @@ void InlineSpiller::spillAroundUses(unsi
>>
>> // Find the slot index where this instruction reads and writes
>> OldLI.
>> // This is usually the def slot, except for tied early clobbers.
>> - SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot();
>> + SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot();
>> if (VNInfo *VNI = OldLI.getVNInfoAt(Idx.getRegSlot(true)))
>> if (SlotIndex::isSameInstr(Idx, VNI->def))
>> Idx = VNI->def;
>> @@ -1268,7 +1268,7 @@ void InlineSpiller::spillAroundUses(unsi
>> }
>> if (RI.Writes) {
>> // Hoist the spill of a sib-reg copy.
>> - if (hoistSpill(OldLI, MI)) {
>> + if (hoistSpill(OldLI, *MI)) {
>> // This COPY is now dead, the value is already in the
>> stack slot.
>> MI->getOperand(0).setIsDead();
>> DeadDefs.push_back(MI);
>> @@ -1349,11 +1349,11 @@ void InlineSpiller::spillAll() {
>> for (MachineRegisterInfo::reg_instr_iterator
>> RI = MRI.reg_instr_begin(Reg), E = MRI.reg_instr_end();
>> RI != E; ) {
>> - MachineInstr *MI = &*(RI++);
>> - assert(SnippetCopies.count(MI) && "Remaining use wasn't a
>> snippet copy");
>> + MachineInstr &MI = *(RI++);
>> + assert(SnippetCopies.count(&MI) && "Remaining use wasn't a
>> snippet copy");
>> // FIXME: Do this with a LiveRangeEdit callback.
>> LIS.RemoveMachineInstrFromMaps(MI);
>> - MI->eraseFromParent();
>> + MI.eraseFromParent();
>> }
>> }
>>
>>
>> Modified: llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp?rev=262115&r1=262114&r2=262115&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp Sat Feb 27 00:40:41
>> 2016
>> @@ -520,9 +520,10 @@ bool LDVImpl::collectDebugValues(Machine
>> continue;
>> }
>> // DBG_VALUE has no slot index, use the previous instruction
>> instead.
>> - SlotIndex Idx = MBBI == MBB->begin() ?
>> - LIS->getMBBStartIdx(MBB) :
>> - LIS->getInstructionIndex(std::prev(MBBI)).getRegSlot();
>> + SlotIndex Idx =
>> + MBBI == MBB->begin()
>> + ? LIS->getMBBStartIdx(MBB)
>> + :
>> LIS->getInstructionIndex(*std::prev(MBBI)).getRegSlot();
>> // Handle consecutive DBG_VALUE instructions with the same
>> slot index.
>> do {
>> if (handleDebugValue(MBBI, Idx)) {
>> @@ -614,7 +615,7 @@ UserValue::addDefsFromCopies(LiveInterva
>>
>> // Is LocNo extended to reach this copy? If not, another def may
>> be blocking
>> // it, or we are looking at a wrong value of LI.
>> - SlotIndex Idx = LIS.getInstructionIndex(MI);
>> + SlotIndex Idx = LIS.getInstructionIndex(*MI);
>> LocMap::iterator I = locInts.find(Idx.getRegSlot(true));
>> if (!I.valid() || I.value() != LocNo)
>> continue;
>>
>> Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=262115&r1=262114&r2=262115&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Sat Feb 27 00:40:41 2016
>> @@ -1454,9 +1454,9 @@ void ConnectedVNInfoEqClasses::Distribut
>> // called, but it is not a requirement.
>> SlotIndex Idx;
>> if (MI->isDebugValue())
>> - Idx = LIS.getSlotIndexes()->getIndexBefore(MI);
>> + Idx = LIS.getSlotIndexes()->getIndexBefore(*MI);
>> else
>> - Idx = LIS.getInstructionIndex(MI);
>> + Idx = LIS.getInstructionIndex(*MI);
>> LiveQueryResult LRQ = LI.Query(Idx);
>> const VNInfo *VNI = MO.readsReg() ? LRQ.valueIn() :
>> LRQ.valueDefined();
>> // In the case of an <undef> use that isn't tied to any def, VNI
>> will be
>> @@ -1563,7 +1563,7 @@ bool ConnectedSubRegClasses::findCompone
>> const LiveInterval::SubRange &SR = *SRInfo.SR;
>> if ((SR.LaneMask & LaneMask) == 0)
>> continue;
>> - SlotIndex Pos = LIS.getInstructionIndex(MO.getParent());
>> + SlotIndex Pos = LIS.getInstructionIndex(*MO.getParent());
>> Pos = MO.isDef() ? Pos.getRegSlot(MO.isEarlyClobber())
>> : Pos.getBaseIndex();
>> const VNInfo *VNI = SR.getVNInfoAt(Pos);
>> @@ -1598,7 +1598,7 @@ void ConnectedSubRegClasses::rewriteOper
>>
>> MachineInstr &MI = *MO.getParent();
>>
>> - SlotIndex Pos = LIS.getInstructionIndex(&MI);
>> + SlotIndex Pos = LIS.getInstructionIndex(MI);
>> unsigned SubRegIdx = MO.getSubReg();
>> LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx);
>>
>> @@ -1672,12 +1672,12 @@ void ConnectedSubRegClasses::computeMain
>> // in and out of the instruction anymore. We need to add new
>> dead and kill
>> // flags in these cases.
>> if (!MO.isUndef()) {
>> - SlotIndex Pos = LIS.getInstructionIndex(MO.getParent());
>> + SlotIndex Pos = LIS.getInstructionIndex(*MO.getParent());
>> if (!LI->liveAt(Pos.getBaseIndex()))
>> MO.setIsUndef();
>> }
>> if (!MO.isDead()) {
>> - SlotIndex Pos = LIS.getInstructionIndex(MO.getParent());
>> + SlotIndex Pos = LIS.getInstructionIndex(*MO.getParent());
>> if (!LI->liveAt(Pos.getDeadSlot()))
>> MO.setIsDead();
>> }
>>
>> Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=262115&r1=262114&r2=262115&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Sat Feb 27
>> 00:40:41 2016
>> @@ -236,7 +236,7 @@ void LiveIntervals::computeRegMasks() {
>> for (const MachineOperand &MO : MI.operands()) {
>> if (!MO.isRegMask())
>> continue;
>> -
>> RegMaskSlots.push_back(Indexes->getInstructionIndex(&MI).getRegSlot());
>> +
>> RegMaskSlots.push_back(Indexes->getInstructionIndex(MI).getRegSlot());
>> RegMaskBits.push_back(MO.getRegMask());
>> }
>> }
>> @@ -247,7 +247,7 @@ void LiveIntervals::computeRegMasks() {
>> if (const uint32_t *Mask = MBB.getEndClobberMask(TRI)) {
>> assert(!MBB.empty() && "empty return block?");
>> RegMaskSlots.push_back(
>> - Indexes->getInstructionIndex(&MBB.back()).getRegSlot());
>> + Indexes->getInstructionIndex(MBB.back()).getRegSlot());
>> RegMaskBits.push_back(Mask);
>> }
>>
>> @@ -443,7 +443,7 @@ bool LiveIntervals::shrinkToUses(LiveInt
>> MachineInstr *UseMI = &*(I++);
>> if (UseMI->isDebugValue() ||
>> !UseMI->readsVirtualRegister(li->reg))
>> continue;
>> - SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
>> + SlotIndex Idx = getInstructionIndex(*UseMI).getRegSlot();
>> LiveQueryResult LRQ = li->Query(Idx);
>> VNInfo *VNI = LRQ.valueIn();
>> if (!VNI) {
>> @@ -551,7 +551,7 @@ void LiveIntervals::shrinkToUses(LiveInt
>> continue;
>> }
>> // We only need to visit each instruction once.
>> - SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
>> + SlotIndex Idx = getInstructionIndex(*UseMI).getRegSlot();
>> if (Idx == LastIdx)
>> continue;
>> LastIdx = Idx;
>> @@ -851,14 +851,13 @@ LiveIntervals::getSpillWeight(bool isDef
>> }
>>
>> LiveRange::Segment
>> -LiveIntervals::addSegmentToEndOfBlock(unsigned reg, MachineInstr*
>> startInst) {
>> +LiveIntervals::addSegmentToEndOfBlock(unsigned reg, MachineInstr
>> &startInst) {
>> LiveInterval& Interval = createEmptyInterval(reg);
>> - VNInfo* VN = Interval.getNextValue(
>> - SlotIndex(getInstructionIndex(startInst).getRegSlot()),
>> - getVNInfoAllocator());
>> - LiveRange::Segment S(
>> - SlotIndex(getInstructionIndex(startInst).getRegSlot()),
>> - getMBBEndIdx(startInst->getParent()), VN);
>> + VNInfo *VN = Interval.getNextValue(
>> + SlotIndex(getInstructionIndex(startInst).getRegSlot()),
>> + getVNInfoAllocator());
>> + LiveRange::Segment
>> S(SlotIndex(getInstructionIndex(startInst).getRegSlot()),
>> + getMBBEndIdx(startInst.getParent()), VN);
>> Interval.addSegment(S);
>>
>> return S;
>> @@ -1348,7 +1347,7 @@ private:
>> && (TRI.getSubRegIndexLaneMask(SubReg) & LaneMask) == 0)
>> continue;
>>
>> - const MachineInstr *MI = MO.getParent();
>> + const MachineInstr &MI = *MO.getParent();
>> SlotIndex InstSlot =
>> LIS.getSlotIndexes()->getInstructionIndex(MI);
>> if (InstSlot > LastUse && InstSlot < OldIdx)
>> LastUse = InstSlot.getRegSlot();
>> @@ -1374,7 +1373,7 @@ private:
>> while (MII != Begin) {
>> if ((--MII)->isDebugValue())
>> continue;
>> - SlotIndex Idx = Indexes->getInstructionIndex(MII);
>> + SlotIndex Idx = Indexes->getInstructionIndex(*MII);
>>
>> // Stop searching when Before is reached.
>> if (!SlotIndex::isEarlierInstr(Before, Idx))
>> @@ -1394,9 +1393,9 @@ private:
>>
>> void LiveIntervals::handleMove(MachineInstr* MI, bool UpdateFlags) {
>> assert(!MI->isBundled() && "Can't handle bundled instructions
>> yet.");
>> - SlotIndex OldIndex = Indexes->getInstructionIndex(MI);
>> - Indexes->removeMachineInstrFromMaps(MI);
>> - SlotIndex NewIndex = Indexes->insertMachineInstrInMaps(MI);
>> + SlotIndex OldIndex = Indexes->getInstructionIndex(*MI);
>> + Indexes->removeMachineInstrFromMaps(*MI);
>> + SlotIndex NewIndex = Indexes->insertMachineInstrInMaps(*MI);
>> assert(getMBBStartIdx(MI->getParent()) <= OldIndex &&
>> OldIndex < getMBBEndIdx(MI->getParent()) &&
>> "Cannot handle moves across basic block boundaries.");
>> @@ -1408,8 +1407,8 @@ void LiveIntervals::handleMove(MachineIn
>> void LiveIntervals::handleMoveIntoBundle(MachineInstr* MI,
>> MachineInstr* BundleStart,
>> bool UpdateFlags) {
>> - SlotIndex OldIndex = Indexes->getInstructionIndex(MI);
>> - SlotIndex NewIndex = Indexes->getInstructionIndex(BundleStart);
>> + SlotIndex OldIndex = Indexes->getInstructionIndex(*MI);
>> + SlotIndex NewIndex = Indexes->getInstructionIndex(*BundleStart);
>> HMEditor HME(*this, *MRI, *TRI, OldIndex, NewIndex, UpdateFlags);
>> HME.updateAllRanges(MI);
>> }
>> @@ -1432,7 +1431,7 @@ void LiveIntervals::repairOldRegInRange(
>> if (MI->isDebugValue())
>> continue;
>>
>> - SlotIndex instrIdx = getInstructionIndex(MI);
>> + SlotIndex instrIdx = getInstructionIndex(*MI);
>> bool isStartValid = getInstructionFromIndex(LII->start);
>> bool isEndValid = getInstructionFromIndex(LII->end);
>>
>> @@ -1509,18 +1508,18 @@ LiveIntervals::repairIntervalsInRange(Ma
>> ArrayRef<unsigned> OrigRegs) {
>> // Find anchor points, which are at the beginning/end of blocks or
>> at
>> // instructions that already have indexes.
>> - while (Begin != MBB->begin() && !Indexes->hasIndex(Begin))
>> + while (Begin != MBB->begin() && !Indexes->hasIndex(*Begin))
>> --Begin;
>> - while (End != MBB->end() && !Indexes->hasIndex(End))
>> + while (End != MBB->end() && !Indexes->hasIndex(*End))
>> ++End;
>>
>> SlotIndex endIdx;
>> if (End == MBB->end())
>> endIdx = getMBBEndIdx(MBB).getPrevSlot();
>> else
>> - endIdx = getInstructionIndex(End);
>> + endIdx = getInstructionIndex(*End);
>>
>> - Indexes->repairIndexesInRange(MBB, Begin, End);
>> + Indexes->repairIndexesInRange(MBB, *Begin, *End);
>
> End might be MBB->end() here, and so unconditionally dereferencing it leads to bad things (even though SlotIndexes::repairIndexesInRange just converts its arguments back into MachineBasicBlock::iterators, the iterator constructor inspects the instruction - at least in the assert in the MachineInstrBundleIterator constructor).
>
> Fixed r270323.
Thanks Hal for the fix. Sorry for missing it :(.
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