[llvm] r270192 - [Sparc] Enable more inline assembly constraints.

[Chris Dewhurst via llvm-commits]

Author: lerochris
Date: Fri May 20 04:03:01 2016
New Revision: 270192

URL: http://llvm.org/viewvc/llvm-project?rev=270192&view=rev
Log:
[Sparc] Enable more inline assembly constraints.

Note: This is specifically to allow GCC's test pr44707 to pass.

Trivial change, not put for differential revision. Test included.

Modified:
    llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.h
    llvm/trunk/test/CodeGen/SPARC/inlineasm.ll

Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=270192&r1=270191&r2=270192&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Fri May 20 04:03:01 2016
@@ -392,6 +392,7 @@ SparcDAGToDAGISel::SelectInlineAsmMemory
   switch (ConstraintID) {
   default: return true;
   case InlineAsm::Constraint_i:
+  case InlineAsm::Constraint_o:
   case InlineAsm::Constraint_m: // memory
    if (!SelectADDRrr(Op, Op0, Op1))
      SelectADDRri(Op, Op0, Op1);

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.h?rev=270192&r1=270191&r2=270192&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.h (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.h Fri May 20 04:03:01 2016
@@ -85,6 +85,14 @@ namespace llvm {
                                       std::string &Constraint,
                                       std::vector<SDValue> &Ops,
                                       SelectionDAG &DAG) const override;
+
+    unsigned
+    getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
+      if (ConstraintCode == "o")
+        return InlineAsm::Constraint_o;
+      return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
+    }
+
     std::pair<unsigned, const TargetRegisterClass *>
     getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
                                  StringRef Constraint, MVT VT) const override;

Modified: llvm/trunk/test/CodeGen/SPARC/inlineasm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/inlineasm.ll?rev=270192&r1=270191&r2=270192&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/inlineasm.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/inlineasm.ll Fri May 20 04:03:01 2016
@@ -8,6 +8,18 @@ entry:
   ret i32 %0
 }
 
+;; Check tests only that the constraints are accepted without a compiler failure.
+; CHECK-LABEL: test_constraints_nro:
+%struct.anon = type { i32, i32 }
+ at v = external global %struct.anon, align 4
+define void @test_constraints_nro() {
+entry:
+  %0 = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @v, i32 0, i32 0);
+  %1 = load i32, i32* getelementptr inbounds (%struct.anon, %struct.anon* @v, i32 0, i32 1);
+  tail call void asm sideeffect "", "nro,nro"(i32 %0, i32 %1)
+  ret void
+}
+
 ; CHECK-LABEL: test_constraint_I:
 ; CHECK:       add %o0, 1023, %o0
 define i32 @test_constraint_I(i32 %a) {