[llvm] r270037 - [mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.

[Daniel Sanders via llvm-commits]

Author: dsanders
Date: Thu May 19 05:42:14 2016
New Revision: 270037

URL: http://llvm.org/viewvc/llvm-project?rev=270037&view=rev
Log:
[mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.

Summary: Partially fixes PR27458

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D20330

Modified:
    llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
    llvm/trunk/test/CodeGen/Mips/mips16fpe.ll

Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td?rev=270037&r1=270036&r2=270037&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td Thu May 19 05:42:14 2016
@@ -1551,7 +1551,7 @@ def: UncondBranch16_pat<br, Bimm16>;
 
 // Small immediates
 def: Mips16Pat<(i32 immSExt16:$in),
-               (AddiuRxRxImmX16 (Move32R16 ZERO), immSExt16:$in)>;
+               (AddiuRxRxImmX16 (MoveR3216 ZERO), immSExt16:$in)>;
 
 def: Mips16Pat<(i32 immZExt16:$in), (LiRxImmX16 immZExt16:$in)>;
 

Modified: llvm/trunk/test/CodeGen/Mips/mips16fpe.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16fpe.ll?rev=270037&r1=270036&r2=270037&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16fpe.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16fpe.ll Thu May 19 05:42:14 2016
@@ -1,4 +1,5 @@
-; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16hf
+; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 \
+; RUN:     -verify-machineinstrs < %s | FileCheck %s -check-prefix=16hf
 
 @x = global float 5.000000e+00, align 4
 @y = global float 1.500000e+01, align 4