[PATCH] D20330: [mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.

[Daniel Sanders via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL270037: [mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine… (authored by dsanders).

Changed prior to commit:
  http://reviews.llvm.org/D20330?vs=57476&id=57760#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D20330

Files:
  llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
  llvm/trunk/test/CodeGen/Mips/mips16fpe.ll

Index: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
===================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
@@ -1551,7 +1551,7 @@
 
 // Small immediates
 def: Mips16Pat<(i32 immSExt16:$in),
-               (AddiuRxRxImmX16 (Move32R16 ZERO), immSExt16:$in)>;
+               (AddiuRxRxImmX16 (MoveR3216 ZERO), immSExt16:$in)>;
 
 def: Mips16Pat<(i32 immZExt16:$in), (LiRxImmX16 immZExt16:$in)>;
 
Index: llvm/trunk/test/CodeGen/Mips/mips16fpe.ll
===================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16fpe.ll
+++ llvm/trunk/test/CodeGen/Mips/mips16fpe.ll
@@ -1,4 +1,5 @@
-; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16hf
+; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 \
+; RUN:     -verify-machineinstrs < %s | FileCheck %s -check-prefix=16hf
 
 @x = global float 5.000000e+00, align 4
 @y = global float 1.500000e+01, align 4


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