[llvm] r270003 - [AArch64] Push comment into function. NFC.
Chad Rosier via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 16:51:17 PDT 2016
Author: mcrosier
Date: Wed May 18 18:51:17 2016
New Revision: 270003
URL: http://llvm.org/viewvc/llvm-project?rev=270003&view=rev
Log:
[AArch64] Push comment into function. NFC.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp?rev=270003&r1=270002&r2=270003&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp Wed May 18 18:51:17 2016
@@ -1974,15 +1974,6 @@ static bool isBitfieldPositioningOp(Sele
return true;
}
-// Given a OR operation, check if we have the following pattern
-// ubfm c, b, imm, imm2 (or something that does the same jobs, see
-// isBitfieldExtractOp)
-// d = e & mask2 ; where mask is a binary sequence of 1..10..0 and
-// countTrailingZeros(mask2) == imm2 - imm + 1
-// f = d | c
-// if yes, given reference arguments will be update so that one can replace
-// the OR instruction with:
-// f = Opc Opd0, Opd1, LSB, MSB ; where Opc is a BFM, LSB = imm, and MSB = imm2
static bool tryBitfieldInsertOpFromOr(SDNode *N, const APInt &UsefulBits,
SelectionDAG *CurDAG) {
assert(N->getOpcode() == ISD::OR && "Expect a OR operation");
@@ -1999,6 +1990,15 @@ static bool tryBitfieldInsertOpFromOr(SD
unsigned NumberOfIgnoredLowBits = UsefulBits.countTrailingZeros();
unsigned NumberOfIgnoredHighBits = UsefulBits.countLeadingZeros();
+ // Given a OR operation, check if we have the following pattern
+ // ubfm c, b, imm, imm2 (or something that does the same jobs, see
+ // isBitfieldExtractOp)
+ // d = e & mask2 ; where mask is a binary sequence of 1..10..0 and
+ // countTrailingZeros(mask2) == imm2 - imm + 1
+ // f = d | c
+ // if yes, replace the OR instruction with:
+ // f = BFM Opd0, Opd1, LSB, MSB ; where LSB = imm, and MSB = imm2
+
// OR is commutative, check all combinations of operand order and values of
// BiggerPattern, i.e.
// Opd0, Opd1, BiggerPattern=false
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