[PATCH] D20393: Add cdp intrinsic tests

[Ranjeet Singh via llvm-commits]

rs created this revision.
rs added a reviewer: rengolin.
rs added a subscriber: llvm-commits.

I've attached a patch which adds tests to make sure the cdp intrinsics fault when trying to pass a variable as an argument. I've also renamed the intrinsics.ll to intrinsics-coprocessor.ll as the only intrinsics that file tested were coprocessor intrinsics and made the checks for specific.

http://reviews.llvm.org/D20393

Files:
  test/CodeGen/ARM/cdp.ll
  test/CodeGen/ARM/cdp2.ll
  test/CodeGen/ARM/intrinsics-coprocessor.ll

Index: test/CodeGen/ARM/intrinsics-coprocessor.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/intrinsics-coprocessor.ll
@@ -0,0 +1,39 @@
+; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 | FileCheck %s
+
+define void @coproc() nounwind {
+entry:
+  ; CHECK: mrc p7, #1, r0, c1, c1, #4
+  %0 = tail call i32 @llvm.arm.mrc(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
+  ; CHECK: mcr p7, #1, r0, c1, c1, #4
+  tail call void @llvm.arm.mcr(i32 7, i32 1, i32 %0, i32 1, i32 1, i32 4) nounwind
+  ; CHECK: mrc2 p7, #1, r1, c1, c1, #4
+  %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
+  ; CHECK: mcr2 p7, #1, r1, c1, c1, #4
+  tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind
+  ; CHECK: mcrr p7, #1, r0, r1, c1
+  tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
+  ; CHECK: mcrr2 p7, #1, r0, r1, c1
+  tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
+  ; CHECK: cdp p7, #3, c1, c1, c1, #5
+  tail call void @llvm.arm.cdp(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
+  ; CHECK: cdp2 p7, #3, c1, c1, c1, #5
+  tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
+  ret void
+}
+
+declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
+
+declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind
+
+declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
+
+declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
+
+declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
+
+declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
+
+declare void @llvm.arm.mcr(i32, i32, i32, i32, i32, i32) nounwind
+
+declare i32 @llvm.arm.mrc(i32, i32, i32, i32, i32) nounwind
Index: test/CodeGen/ARM/cdp2.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/cdp2.ll
@@ -0,0 +1,13 @@
+; RUN: not llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
+; RUN: not llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
+
+; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.cdp2
+define void @cdp2(i32 %a) #0 {
+  %a.addr = alloca i32, align 4
+  store i32 %a, i32* %a.addr, align 4
+  %1 = load i32, i32* %a.addr, align 4
+  call void @llvm.arm.cdp2(i32 %1, i32 2, i32 3, i32 4, i32 5, i32 6)
+  ret void
+}
+
+declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
Index: test/CodeGen/ARM/cdp.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/cdp.ll
@@ -0,0 +1,13 @@
+; RUN: not llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
+; RUN: not llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
+
+; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.cdp
+define void @cdp(i32 %a) #0 {
+  %a.addr = alloca i32, align 4
+  store i32 %a, i32* %a.addr, align 4
+  %1 = load i32, i32* %a.addr, align 4
+  call void @llvm.arm.cdp(i32 %1, i32 2, i32 3, i32 4, i32 5, i32 6)
+  ret void
+}
+
+declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind


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