[PATCH] D20387: [AArch64] Generate a BFI/BFXIL from 'or (and X, MaskImm), OrImm' iff the value being inserted only sets known zero bits.

Chad Rosier via llvm-commits llvm-commits at lists.llvm.org
Wed May 18 14:42:41 PDT 2016


mcrosier created this revision.
mcrosier added reviewers: t.p.northover, jmolloy, gberry.
mcrosier added subscribers: bmakam, junbuml, llvm-commits.
Herald added subscribers: rengolin, aemerson.

This combine transforms things like 

  and     w8, w0, #0xfffffff0
  movz    w9, #5
  orr             w0, w8, w9

to
  movz    w8, #5
  bfxil   w0, w8, #0, #4

The combine is tuned to make sure we always reduce the number of instructions.  We avoid churning code for what is expected to be performance neutral changes (e.g., converted AND+OR to OR+BFI).

Please take a look,
 Chad


http://reviews.llvm.org/D20387

Files:
  lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  test/CodeGen/AArch64/bfi.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D20387.57681.patch
Type: text/x-patch
Size: 7772 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160518/6dd35f7d/attachment.bin>


More information about the llvm-commits mailing list