[llvm] r269976 - [WebAssembly] Disable the MachineScheduler.
Dan Gohman via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 13:19:02 PDT 2016
Author: djg
Date: Wed May 18 15:19:02 2016
New Revision: 269976
URL: http://llvm.org/viewvc/llvm-project?rev=269976&view=rev
Log:
[WebAssembly] Disable the MachineScheduler.
Modified:
llvm/trunk/lib/Target/WebAssembly/README.txt
llvm/trunk/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
Modified: llvm/trunk/lib/Target/WebAssembly/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/README.txt?rev=269976&r1=269975&r2=269976&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/README.txt (original)
+++ llvm/trunk/lib/Target/WebAssembly/README.txt Wed May 18 15:19:02 2016
@@ -128,3 +128,10 @@ has two operands and one result, so in s
prefering the operands.
//===---------------------------------------------------------------------===//
+
+Instruction ordering has a significant influence on register stackification and
+coloring. Consider experimenting with the MachineScheduler (enable via
+enableMachineScheduler) and determine if it can be configured to schedule
+instructions advantageously for this purpose.
+
+//===---------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblySubtarget.cpp?rev=269976&r1=269975&r2=269976&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblySubtarget.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblySubtarget.cpp Wed May 18 15:19:02 2016
@@ -45,5 +45,11 @@ WebAssemblySubtarget::WebAssemblySubtarg
InstrInfo(initializeSubtargetDependencies(FS)), TSInfo(),
TLInfo(TM, *this) {}
-bool WebAssemblySubtarget::enableMachineScheduler() const { return true; }
+bool WebAssemblySubtarget::enableMachineScheduler() const {
+ // Disable the MachineScheduler for now. Even with ShouldTrackPressure set and
+ // enableMachineSchedDefaultSched overridden, it appears to have an overall
+ // negative effect for the kinds of register optimizations we're doing.
+ return false;
+}
+
bool WebAssemblySubtarget::useAA() const { return true; }
More information about the llvm-commits
mailing list