[llvm] r269938 - AMDGPU: Fix assert on ttmp registers

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed May 18 08:19:53 PDT 2016


Author: arsenm
Date: Wed May 18 10:19:50 2016
New Revision: 269938

URL: http://llvm.org/viewvc/llvm-project?rev=269938&view=rev
Log:
AMDGPU: Fix assert on ttmp registers

Use register class that does not include them when looking
for unallocated registers.

This is hit by the udiv v8i64 test in the opencl integer
conformance test, and takes a few seconds to compile in
a debug build so no test included.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIFrameLowering.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SIFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIFrameLowering.cpp?rev=269938&r1=269937&r2=269938&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIFrameLowering.cpp Wed May 18 10:19:50 2016
@@ -26,8 +26,8 @@ static bool hasOnlySGPRSpills(const SIMa
 }
 
 static ArrayRef<MCPhysReg> getAllSGPR128() {
-  return makeArrayRef(AMDGPU::SReg_128RegClass.begin(),
-                      AMDGPU::SReg_128RegClass.getNumRegs());
+  return makeArrayRef(AMDGPU::SGPR_128RegClass.begin(),
+                      AMDGPU::SGPR_128RegClass.getNumRegs());
 }
 
 static ArrayRef<MCPhysReg> getAllSGPRs() {




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