[PATCH] D18352: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions
Zlatko Buljan via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 00:46:14 PDT 2016
zbuljan updated this revision to Diff 57564.
zbuljan added a comment.
Rebased to work with TOT.
http://reviews.llvm.org/D18352
Files:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
lib/Target/Mips/MicroMips32r6InstrFormats.td
lib/Target/Mips/MicroMips32r6InstrInfo.td
lib/Target/Mips/Mips32r6InstrInfo.td
test/MC/Disassembler/Mips/micromips32r6/valid.txt
test/MC/Disassembler/Mips/micromips64r6/valid.txt
test/MC/Mips/micromips32r6/invalid.s
test/MC/Mips/micromips32r6/valid.s
test/MC/Mips/micromips64r6/invalid.s
test/MC/Mips/micromips64r6/valid.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D18352.57564.patch
Type: text/x-patch
Size: 13470 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160518/c39babe0/attachment.bin>
More information about the llvm-commits
mailing list