[llvm] r269811 - Fix an assert in SelectionDAGBuilder when processing inline asm
Renato Golin via llvm-commits
llvm-commits at lists.llvm.org
Tue May 17 12:52:01 PDT 2016
Author: rengolin
Date: Tue May 17 14:52:01 2016
New Revision: 269811
URL: http://llvm.org/viewvc/llvm-project?rev=269811&view=rev
Log:
Fix an assert in SelectionDAGBuilder when processing inline asm
When processing inline asm that contains errors, make sure we can recover
gracefully by creating an UNDEF SDValue for the inline asm statement before
returning from SelectionDAGBuilder::visitInlineAsm. This is necessary for
consumers that don't exit on the first error that is emitted (e.g. clang)
and that would assert later on.
Fixes PR24071.
Patch by Diana Picus.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll
llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll
llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll
llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll
llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll
llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll
llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll
llvm/trunk/test/CodeGen/PowerPC/vec-asm-disabled.ll
llvm/trunk/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue May 17 14:52:01 2016
@@ -6798,10 +6798,9 @@ void SelectionDAGBuilder::visitInlineAsm
// Copy the output from the appropriate register. Find a register that
// we can use.
if (OpInfo.AssignedRegs.Regs.empty()) {
- LLVMContext &Ctx = *DAG.getContext();
- Ctx.emitError(CS.getInstruction(),
- "couldn't allocate output register for constraint '" +
- Twine(OpInfo.ConstraintCode) + "'");
+ emitInlineAsmError(
+ CS, "couldn't allocate output register for constraint '" +
+ Twine(OpInfo.ConstraintCode) + "'");
return;
}
@@ -6854,10 +6853,9 @@ void SelectionDAGBuilder::visitInlineAsm
// Add (OpFlag&0xffff)>>3 registers to MatchedRegs.
if (OpInfo.isIndirect) {
// This happens on gcc/testsuite/gcc.dg/pr8788-1.c
- LLVMContext &Ctx = *DAG.getContext();
- Ctx.emitError(CS.getInstruction(), "inline asm not supported yet:"
- " don't know how to handle tied "
- "indirect register inputs");
+ emitInlineAsmError(CS, "inline asm not supported yet:"
+ " don't know how to handle tied "
+ "indirect register inputs");
return;
}
@@ -6871,10 +6869,9 @@ void SelectionDAGBuilder::visitInlineAsm
if (const TargetRegisterClass *RC = TLI.getRegClassFor(RegVT))
MatchedRegs.Regs.push_back(RegInfo.createVirtualRegister(RC));
else {
- LLVMContext &Ctx = *DAG.getContext();
- Ctx.emitError(CS.getInstruction(),
- "inline asm error: This value"
- " type register class is not natively supported!");
+ emitInlineAsmError(
+ CS, "inline asm error: This value"
+ " type register class is not natively supported!");
return;
}
}
@@ -6912,10 +6909,8 @@ void SelectionDAGBuilder::visitInlineAsm
TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode,
Ops, DAG);
if (Ops.empty()) {
- LLVMContext &Ctx = *DAG.getContext();
- Ctx.emitError(CS.getInstruction(),
- "invalid operand for inline asm constraint '" +
- Twine(OpInfo.ConstraintCode) + "'");
+ emitInlineAsmError(CS, "invalid operand for inline asm constraint '" +
+ Twine(OpInfo.ConstraintCode) + "'");
return;
}
@@ -6955,20 +6950,17 @@ void SelectionDAGBuilder::visitInlineAsm
// TODO: Support this.
if (OpInfo.isIndirect) {
- LLVMContext &Ctx = *DAG.getContext();
- Ctx.emitError(CS.getInstruction(),
- "Don't know how to handle indirect register inputs yet "
- "for constraint '" +
- Twine(OpInfo.ConstraintCode) + "'");
+ emitInlineAsmError(
+ CS, "Don't know how to handle indirect register inputs yet "
+ "for constraint '" +
+ Twine(OpInfo.ConstraintCode) + "'");
return;
}
// Copy the input into the appropriate registers.
if (OpInfo.AssignedRegs.Regs.empty()) {
- LLVMContext &Ctx = *DAG.getContext();
- Ctx.emitError(CS.getInstruction(),
- "couldn't allocate input reg for constraint '" +
- Twine(OpInfo.ConstraintCode) + "'");
+ emitInlineAsmError(CS, "couldn't allocate input reg for constraint '" +
+ Twine(OpInfo.ConstraintCode) + "'");
return;
}
@@ -7066,6 +7058,17 @@ void SelectionDAGBuilder::visitInlineAsm
DAG.setRoot(Chain);
}
+void SelectionDAGBuilder::emitInlineAsmError(ImmutableCallSite CS,
+ const Twine &Message) {
+ LLVMContext &Ctx = *DAG.getContext();
+ Ctx.emitError(CS.getInstruction(), Message);
+
+ // Make sure we leave the DAG in a valid state
+ const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+ auto VT = TLI.getValueType(DAG.getDataLayout(), CS.getType());
+ setValue(CS.getInstruction(), DAG.getUNDEF(VT));
+}
+
void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
DAG.setRoot(DAG.getNode(ISD::VASTART, getCurSDLoc(),
MVT::Other, getRoot(),
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Tue May 17 14:52:01 2016
@@ -910,6 +910,8 @@ private:
void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
+ void emitInlineAsmError(ImmutableCallSite CS, const Twine &Message);
+
/// EmitFuncArgumentDbgValue - If V is an function argument then create
/// corresponding DBG_VALUE machine instruction for it now. At the end of
/// instruction selection, they will be inserted to the entry BB.
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-I.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -march=arm64 -exit-on-error < %s 2> %t
+; RUN: not llc -march=arm64 < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
; Check for at least one invalid constant.
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-J.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -march=arm64 -exit-on-error < %s 2> %t
+; RUN: not llc -march=arm64 < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
; Check for at least one invalid constant.
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-K.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -march=arm64 -exit-on-error < %s 2> %t
+; RUN: not llc -march=arm64 < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
; Check for at least one invalid constant.
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-L.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -march=arm64 -exit-on-error < %s 2> %t
+; RUN: not llc -march=arm64 < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
; Check for at least one invalid constant.
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-M.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -march=arm64 -exit-on-error < %s 2> %t
+; RUN: not llc -march=arm64 < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
; Check for at least one invalid constant.
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-inline-asm-error-N.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -march=arm64 -exit-on-error < %s 2> %t
+; RUN: not llc -march=arm64 < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
; Check for at least one invalid constant.
Modified: llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/crbit-asm-disabled.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -mcpu=pwr7 -exit-on-error -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not llc -mcpu=pwr7 -o /dev/null %s 2>&1 | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/PowerPC/vec-asm-disabled.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vec-asm-disabled.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/vec-asm-disabled.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/vec-asm-disabled.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -mcpu=pwr7 -exit-on-error -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not llc -mcpu=pwr7 -o /dev/null %s 2>&1 | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll?rev=269811&r1=269810&r2=269811&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll (original)
+++ llvm/trunk/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll Tue May 17 14:52:01 2016
@@ -1,4 +1,4 @@
-; RUN: not llc -exit-on-error -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not llc -o /dev/null %s 2>&1 | FileCheck %s
target triple = "x86_64--"
; CHECK: error: couldn't allocate output register for constraint '{ax}'
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