[llvm] r269480 - AMDGPU/R600: Fold global address operand
Jan Vesely via llvm-commits
llvm-commits at lists.llvm.org
Fri May 13 13:39:32 PDT 2016
Author: jvesely
Date: Fri May 13 15:39:31 2016
New Revision: 269480
URL: http://llvm.org/viewvc/llvm-project?rev=269480&view=rev
Log:
AMDGPU/R600: Fold global address operand
Reviewers: tstellard
Subscribers: arsenm
Differential Revision: http://reviews.llvm.org/D19793
Modified:
llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp
llvm/trunk/test/CodeGen/AMDGPU/gv-const-addrspace.ll
Modified: llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp?rev=269480&r1=269479&r2=269480&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/R600ISelLowering.cpp Fri May 13 15:39:31 2016
@@ -2250,6 +2250,13 @@ FoldOperand(SDNode *ParentNode, unsigned
Src = DAG.getRegister(AMDGPU::ALU_CONST, MVT::f32);
return true;
}
+ case AMDGPU::MOV_IMM_GLOBAL_ADDR:
+ // Check if the Imm slot is used. Taken from below.
+ if (cast<ConstantSDNode>(Imm)->getZExtValue())
+ return false;
+ Imm = Src.getOperand(0);
+ Src = DAG.getRegister(AMDGPU::ALU_LITERAL_X, MVT::i32);
+ return true;
case AMDGPU::MOV_IMM_I32:
case AMDGPU::MOV_IMM_F32: {
unsigned ImmReg = AMDGPU::ALU_LITERAL_X;
Modified: llvm/trunk/test/CodeGen/AMDGPU/gv-const-addrspace.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/gv-const-addrspace.ll?rev=269480&r1=269479&r2=269480&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/gv-const-addrspace.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/gv-const-addrspace.ll Fri May 13 15:39:31 2016
@@ -14,6 +14,7 @@
; EG: VTX_READ_32
; EG: @float_gv
; EG-NOT: MOVA_INT
+; EG-NOT: MOV
define void @float(float addrspace(1)* %out, i32 %index) {
entry:
%0 = getelementptr inbounds [5 x float], [5 x float] addrspace(2)* @float_gv, i32 0, i32 %index
@@ -31,6 +32,7 @@ entry:
; EG: VTX_READ_32
; EG: @i32_gv
; EG-NOT: MOVA_INT
+; EG-NOT: MOV
define void @i32(i32 addrspace(1)* %out, i32 %index) {
entry:
%0 = getelementptr inbounds [5 x i32], [5 x i32] addrspace(2)* @i32_gv, i32 0, i32 %index
@@ -50,6 +52,7 @@ entry:
; EG: VTX_READ_32
; EG: @struct_foo_gv
; EG-NOT: MOVA_INT
+; EG-NOT: MOV
define void @struct_foo_gv_load(i32 addrspace(1)* %out, i32 %index) {
%gep = getelementptr inbounds [1 x %struct.foo], [1 x %struct.foo] addrspace(2)* @struct_foo_gv, i32 0, i32 0, i32 1, i32 %index
%load = load i32, i32 addrspace(2)* %gep, align 4
@@ -68,6 +71,7 @@ define void @struct_foo_gv_load(i32 addr
; EG: VTX_READ_32
; EG: @array_v1_gv
; EG-NOT: MOVA_INT
+; EG-NOT: MOV
define void @array_v1_gv_load(<1 x i32> addrspace(1)* %out, i32 %index) {
%gep = getelementptr inbounds [4 x <1 x i32>], [4 x <1 x i32>] addrspace(2)* @array_v1_gv, i32 0, i32 %index
%load = load <1 x i32>, <1 x i32> addrspace(2)* %gep, align 4
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