[llvm] r269458 - [Hexagon] Remove dead nodes from SelectionDAG to avoid cycles

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Fri May 13 13:48:15 2016
New Revision: 269458

URL: http://llvm.org/viewvc/llvm-project?rev=269458&view=rev
Log:
[Hexagon] Remove dead nodes from SelectionDAG to avoid cycles

Recent changes to the instruction selection code exposed a problem where
a dead node was not removed on time. This node had both input and output
chains, which lead to an apparent cycle.

Added:
    llvm/trunk/test/CodeGen/Hexagon/circ-load-isel.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp?rev=269458&r1=269457&r2=269458&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp Fri May 13 13:48:15 2016
@@ -654,7 +654,7 @@ bool HexagonDAGToDAGISel::tryLoadOfLoadI
     // This transformation will leave the intrinsic dead. If it remains in
     // the DAG, the selection code will see it again, but without the load,
     // and it will generate a store that is normally required for it.
-    CurDAG->RemoveDeadNodes();
+    CurDAG->RemoveDeadNode(C);
     return true;
   }
 
@@ -1045,6 +1045,7 @@ void HexagonDAGToDAGISel::SelectZeroExte
 void HexagonDAGToDAGISel::SelectIntrinsicWChain(SDNode *N) {
   if (MachineSDNode *L = LoadInstrForLoadIntrinsic(N)) {
     StoreInstrForLoadIntrinsic(L, N);
+    CurDAG->RemoveDeadNode(N);
     return;
   }
   SelectCode(N);

Added: llvm/trunk/test/CodeGen/Hexagon/circ-load-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/circ-load-isel.ll?rev=269458&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/circ-load-isel.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/circ-load-isel.ll Fri May 13 13:48:15 2016
@@ -0,0 +1,18 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+; CHECK: = memw{{.*}}circ
+
+target triple = "hexagon"
+
+ at l = external global i32, align 4
+
+; Function Attrs: nounwind optsize
+define void @circ2() #0 {
+entry:
+  store i32 0, i32* @l, align 4
+  %0 = tail call i8* @llvm.hexagon.circ.ldw(i8* undef, i8* undef, i32 150995968, i32 4)
+  unreachable
+}
+
+declare i8* @llvm.hexagon.circ.ldw(i8*, i8*, i32, i32) #1
+attributes #0 = { nounwind optsize }
+attributes #1 = { argmemonly nounwind }