[PATCH] D20239: [Power9] Add codegen for VSX word insert/extract instructions

[Nemanja Ivanovic via llvm-commits]

nemanjai created this revision.
nemanjai added reviewers: hfinkel, kbarton, cycheng, amehsan, wschmidt, seurer.
nemanjai added subscribers: llvm-commits, echristo.
nemanjai set the repository for this revision to rL LLVM.

The new instructions are not quite a match for the corresponding IR instructions (extractelement/insertelement) because both the sources the results of these instructions are VSX registers. However, there are patterns where these are useful:
- Insert integer element can be accomplished with a direct move followed by in insert
- Insert floating element can be accomplished with a conversion (from 64-bit single to 32-bit single) followed by an insert
- Extract element on its own likely isn't profitable using these instructions
- Extracting an integer element when the result will be converted to float (i.e. stay in one of the bottom 32 VSX registers) can be accomplished by an extract and a convert, thereby saving 2 direct moves (VSR <-> GPR)

Repository:
  rL LLVM

http://reviews.llvm.org/D20239

Files:
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCISelLowering.h
  lib/Target/PowerPC/PPCInstrInfo.td
  lib/Target/PowerPC/PPCInstrVSX.td
  lib/Target/PowerPC/README_P9.txt
  test/CodeGen/p9-xxinsertw-xxextractuw.ll

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