[PATCH] D20016: [X86][SSSE3] Lower vector CTLZ with PSHUFB lookups

Thu May 12 15:10:05 PDT 2016

chandlerc added inline comments.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:18781
@@ +18780,3 @@
+  SDValue Hi = DAG.getNode(ISD::SRL, DL, CurrVT, Op0, NibbleShift);
+  SDValue HiZ = DAG.getSetCC(DL, CurrVT, Hi, Zero, ISD::SETEQ);
+
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I'm not following how you're using this conditional. Could you comment the algorithm in somewhat more detail here? I can probably figure it out myself, but it seems better to make the comments explain this in clear terms.

Repository:
  rL LLVM

http://reviews.llvm.org/D20016