[PATCH] D20212: [MIB] Create a helper function getRegState to extract all register flags

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Thu May 12 09:26:11 PDT 2016


kparzysz created this revision.
kparzysz added reviewers: dexonsmith, rnk.
kparzysz added a subscriber: llvm-commits.
kparzysz set the repository for this revision to rL LLVM.

When creating a new instruction that is based on an existing one, it may be useful to have a simple way of extracting the union of all flags from a register operand.

Repository:
  rL LLVM

http://reviews.llvm.org/D20212

Files:
  include/llvm/CodeGen/MachineInstrBuilder.h
  lib/Target/Hexagon/HexagonSplitDouble.cpp

Index: lib/Target/Hexagon/HexagonSplitDouble.cpp
===================================================================
--- lib/Target/Hexagon/HexagonSplitDouble.cpp
+++ lib/Target/Hexagon/HexagonSplitDouble.cpp
@@ -108,18 +108,6 @@
   "Hexagon Split Double Registers", false, false)
 
 
-static inline uint32_t getRegState(const MachineOperand &R) {
-  assert(R.isReg());
-  return getDefRegState(R.isDef()) |
-         getImplRegState(R.isImplicit()) |
-         getKillRegState(R.isKill()) |
-         getDeadRegState(R.isDead()) |
-         getUndefRegState(R.isUndef()) |
-         getInternalReadRegState(R.isInternalRead()) |
-         (R.isDebug() ? RegState::Debug : 0);
-}
-
-
 void HexagonSplitDoubleRegs::dump_partition(raw_ostream &os,
       const USet &Part, const TargetRegisterInfo &TRI) {
   dbgs() << '{';
Index: include/llvm/CodeGen/MachineInstrBuilder.h
===================================================================
--- include/llvm/CodeGen/MachineInstrBuilder.h
+++ include/llvm/CodeGen/MachineInstrBuilder.h
@@ -386,6 +386,16 @@
   return B ? RegState::Debug : 0;
 }
 
+inline unsigned getRegState(const MachineOperand &RegOp) {
+  assert(RegOp.isReg() && "Not a register operand");
+  return getDefRegState(RegOp.isDef())                    |
+         getImplRegState(RegOp.isImplicit())              |
+         getKillRegState(RegOp.isKill())                  |
+         getDeadRegState(RegOp.isDead())                  |
+         getUndefRegState(RegOp.isUndef())                |
+         getInternalReadRegState(RegOp.isInternalRead())  |
+         getDebugRegState(RegOp.isDebug());
+}
 
 /// Helper class for constructing bundles of MachineInstrs.
 ///


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D20212.57057.patch
Type: text/x-patch
Size: 1691 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160512/c01e63f1/attachment.bin>


More information about the llvm-commits mailing list