[llvm] r269249 - Fix a bug when hoist spill to a BB with landingpad successor.

Quentin Colombet via llvm-commits llvm-commits at lists.llvm.org
Wed May 11 18:28:03 PDT 2016


For the record (release manager people, this is for you :)), this fixes a bug introduced in r266162.

Q.

> On May 11, 2016, at 3:37 PM, Wei Mi via llvm-commits <llvm-commits at lists.llvm.org> wrote:
> 
> Author: wmi
> Date: Wed May 11 17:37:43 2016
> New Revision: 269249
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=269249&view=rev
> Log:
> Fix a bug when hoist spill to a BB with landingpad successor.
> 
> This is to fix the bug in https://llvm.org/bugs/show_bug.cgi?id=27612.
> 
> When spill is hoisted to a BB with landingpad successor, and if the VNI
> of the spill reg lives into the landingpad successor, the spill should be
> inserted before the call which may throw exception. InsertPointAnalysis
> is used to compute the safe insert point.
> 
> http://reviews.llvm.org/D20027 is a preparing patch for this patch.
> 
> Differential Revision: http://reviews.llvm.org/D19884.
> 
> 
> Added:
>    llvm/trunk/test/CodeGen/X86/hoist-spill-lpad.ll
> Modified:
>    llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=269249&r1=269248&r2=269249&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
> +++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Wed May 11 17:37:43 2016
> @@ -13,6 +13,7 @@
> //===----------------------------------------------------------------------===//
> 
> #include "Spiller.h"
> +#include "SplitKit.h"
> #include "llvm/ADT/MapVector.h"
> #include "llvm/ADT/SetVector.h"
> #include "llvm/ADT/Statistic.h"
> @@ -69,6 +70,8 @@ class HoistSpillHelper : private LiveRan
>   const TargetRegisterInfo &TRI;
>   const MachineBlockFrequencyInfo &MBFI;
> 
> +  InsertPointAnalysis IPA;
> +
>   // Map from StackSlot to its original register.
>   DenseMap<int, unsigned> StackSlotToReg;
>   // Map from pair of (StackSlot and Original VNI) to a set of spills which
> @@ -114,7 +117,8 @@ public:
>         MFI(*mf.getFrameInfo()), MRI(mf.getRegInfo()),
>         TII(*mf.getSubtarget().getInstrInfo()),
>         TRI(*mf.getSubtarget().getRegisterInfo()),
> -        MBFI(pass.getAnalysis<MachineBlockFrequencyInfo>()) {}
> +        MBFI(pass.getAnalysis<MachineBlockFrequencyInfo>()),
> +        IPA(LIS, mf.getNumBlockIDs()) {}
> 
>   void addToMergeableSpills(MachineInstr *Spill, int StackSlot,
>                             unsigned Original);
> @@ -1075,7 +1079,7 @@ bool HoistSpillHelper::rmFromMergeableSp
> bool HoistSpillHelper::isSpillCandBB(unsigned OrigReg, VNInfo &OrigVNI,
>                                      MachineBasicBlock &BB, unsigned &LiveReg) {
>   SlotIndex Idx;
> -  MachineBasicBlock::iterator MI = BB.getFirstTerminator();
> +  MachineBasicBlock::iterator MI = IPA.getLastInsertPointIter(BB);
>   if (MI != BB.end())
>     Idx = LIS.getInstructionIndex(*MI);
>   else
> @@ -1376,6 +1380,8 @@ void HoistSpillHelper::hoistAllSpills()
>   for (auto &Ent : MergeableSpills) {
>     int Slot = Ent.first.first;
>     unsigned OrigReg = SlotToOrigReg[Slot];
> +    LiveInterval &OrigLI = LIS.getInterval(OrigReg);
> +    IPA.setInterval(&OrigLI);
>     VNInfo *OrigVNI = Ent.first.second;
>     SmallPtrSet<MachineInstr *, 16> &EqValSpills = Ent.second;
>     if (Ent.second.empty())
> @@ -1408,17 +1414,15 @@ void HoistSpillHelper::hoistAllSpills()
> 
>     // Stack live range update.
>     LiveInterval &StackIntvl = LSS.getInterval(Slot);
> -    if (!SpillsToIns.empty() || !SpillsToRm.empty()) {
> -      LiveInterval &OrigLI = LIS.getInterval(OrigReg);
> +    if (!SpillsToIns.empty() || !SpillsToRm.empty())
>       StackIntvl.MergeValueInAsValue(OrigLI, OrigVNI,
>                                      StackIntvl.getValNumInfo(0));
> -    }
> 
>     // Insert hoisted spills.
>     for (auto const Insert : SpillsToIns) {
>       MachineBasicBlock *BB = Insert.first;
>       unsigned LiveReg = Insert.second;
> -      MachineBasicBlock::iterator MI = BB->getFirstTerminator();
> +      MachineBasicBlock::iterator MI = IPA.getLastInsertPointIter(*BB);
>       TII.storeRegToStackSlot(*BB, MI, LiveReg, false, Slot,
>                               MRI.getRegClass(LiveReg), &TRI);
>       LIS.InsertMachineInstrRangeInMaps(std::prev(MI), MI);
> 
> Added: llvm/trunk/test/CodeGen/X86/hoist-spill-lpad.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/hoist-spill-lpad.ll?rev=269249&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/hoist-spill-lpad.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/hoist-spill-lpad.ll Wed May 11 17:37:43 2016
> @@ -0,0 +1,62 @@
> +; RUN: llc < %s | FileCheck %s
> +;
> +; PR27612. The following spill is hoisted from two locations: the fall
> +; through succ block and the landingpad block of a call which may throw
> +; exception. If it is not hoisted before the call, the spill will be
> +; missing on the landingpad path.
> +;
> +; CHECK-LABEL: _Z3foov:
> +; CHECK: movq  %rbx, (%rsp)          # 8-byte Spill
> +; CHECK-NEXT: callq _Z3goov
> +
> +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
> +target triple = "x86_64-unknown-linux-gnu"
> +
> + at a = global [20 x i64] zeroinitializer, align 16
> + at _ZTIi = external constant i8*
> +
> +; Function Attrs: uwtable
> +define void @_Z3foov() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
> +entry:
> +  %tmp = load i64, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 1), align 8
> +  invoke void @_Z3goov()
> +          to label %try.cont unwind label %lpad
> +
> +lpad:                                             ; preds = %entry
> +  %tmp1 = landingpad { i8*, i32 }
> +          cleanup
> +          catch i8* bitcast (i8** @_ZTIi to i8*)
> +  %tmp2 = extractvalue { i8*, i32 } %tmp1, 1
> +  %tmp3 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*))
> +  %matches = icmp eq i32 %tmp2, %tmp3
> +  br i1 %matches, label %catch, label %ehcleanup
> +
> +catch:                                            ; preds = %lpad
> +  %tmp4 = extractvalue { i8*, i32 } %tmp1, 0
> +  %tmp5 = tail call i8* @__cxa_begin_catch(i8* %tmp4)
> +  store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 2), align 16
> +  tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{memory},~{dirflag},~{fpsr},~{flags}"()
> +  store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 3), align 8
> +  tail call void @__cxa_end_catch()
> +  br label %try.cont
> +
> +try.cont:                                         ; preds = %catch, %entry
> +  store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 4), align 16
> +  tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{memory},~{dirflag},~{fpsr},~{flags}"()
> +  store i64 %tmp, i64* getelementptr inbounds ([20 x i64], [20 x i64]* @a, i64 0, i64 5), align 8
> +  ret void
> +
> +ehcleanup:                                        ; preds = %lpad
> +  resume { i8*, i32 } %tmp1
> +}
> +
> +declare void @_Z3goov()
> +
> +declare i32 @__gxx_personality_v0(...)
> +
> +; Function Attrs: nounwind readnone
> +declare i32 @llvm.eh.typeid.for(i8*)
> +
> +declare i8* @__cxa_begin_catch(i8*)
> +
> +declare void @__cxa_end_catch()
> 
> 
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