[PATCH] D20156: PR24071 Fix an assert in SelectionDAGBuilder

[Diana Picus via llvm-commits]

rovka created this revision.
rovka added reviewers: rengolin, resistor, mcrosier, qcolombet, bogner, echristo.
rovka added a subscriber: llvm-commits.
Herald added a subscriber: joker.eph.

When processing inline asm that contains errors, make sure we can recover gracefully by creating an UNDEF SDValue for the inline asm statement before returning from SelectionDAGBuilder::visitInlineAsm. This is necessary for consumers that don't exit on the first error that is emitted (e.g. clang) and that would assert later on.

Note that this cannot be tested with the traditional LLVM CodeGen tests because llc's diagnostic handler exits when identifying the error and does not reach the assert that we're trying to avoid here. Therefore, a test will be added in clang instead, as done by Chad Rosier for a similar case [1].

Fixes PR24071.

[1] https://www.mail-archive.com/cfe-commits@cs.uiuc.edu/msg70985.html

http://reviews.llvm.org/D20156

Files:
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -6794,6 +6794,8 @@
         Ctx.emitError(CS.getInstruction(),
                       "couldn't allocate output register for constraint '" +
                           Twine(OpInfo.ConstraintCode) + "'");
+        auto VT = TLI.getValueType(DAG.getDataLayout(), CS.getType());
+        setValue(CS.getInstruction(), DAG.getUNDEF(VT));
         return;
       }
 
@@ -6850,6 +6852,8 @@
             Ctx.emitError(CS.getInstruction(), "inline asm not supported yet:"
                                                " don't know how to handle tied "
                                                "indirect register inputs");
+            auto VT = TLI.getValueType(DAG.getDataLayout(), CS.getType());
+            setValue(CS.getInstruction(), DAG.getUNDEF(VT));
             return;
           }
 
@@ -6867,6 +6871,8 @@
               Ctx.emitError(CS.getInstruction(),
                             "inline asm error: This value"
                             " type register class is not natively supported!");
+              auto VT = TLI.getValueType(DAG.getDataLayout(), CS.getType());
+              setValue(CS.getInstruction(), DAG.getUNDEF(VT));
               return;
             }
           }
@@ -6908,6 +6914,8 @@
           Ctx.emitError(CS.getInstruction(),
                         "invalid operand for inline asm constraint '" +
                             Twine(OpInfo.ConstraintCode) + "'");
+          auto VT = TLI.getValueType(DAG.getDataLayout(), CS.getType());
+          setValue(CS.getInstruction(), DAG.getUNDEF(VT));
           return;
         }
 
@@ -6952,6 +6960,8 @@
                       "Don't know how to handle indirect register inputs yet "
                       "for constraint '" +
                           Twine(OpInfo.ConstraintCode) + "'");
+        auto VT = TLI.getValueType(DAG.getDataLayout(), CS.getType());
+        setValue(CS.getInstruction(), DAG.getUNDEF(VT));
         return;
       }
 
@@ -6961,6 +6971,8 @@
         Ctx.emitError(CS.getInstruction(),
                       "couldn't allocate input reg for constraint '" +
                           Twine(OpInfo.ConstraintCode) + "'");
+        auto VT = TLI.getValueType(DAG.getDataLayout(), CS.getType());
+        setValue(CS.getInstruction(), DAG.getUNDEF(VT));
         return;
       }
 


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