[llvm] r269147 - AMDGPU: Make some instructions convergent
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue May 10 17:32:32 PDT 2016
Author: arsenm
Date: Tue May 10 19:32:31 2016
New Revision: 269147
URL: http://llvm.org/viewvc/llvm-project?rev=269147&view=rev
Log:
AMDGPU: Make some instructions convergent
Modified:
llvm/trunk/lib/Target/AMDGPU/SIInstructions.td
Modified: llvm/trunk/lib/Target/AMDGPU/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstructions.td?rev=269147&r1=269146&r2=269147&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstructions.td Tue May 10 19:32:31 2016
@@ -1218,7 +1218,9 @@ def V_READFIRSTLANE_B32 : VOP1 <
(ins VS_32:$src0),
"v_readfirstlane_b32 $vdst, $src0",
[]
->;
+> {
+ let isConvergent = 1;
+}
}
@@ -1585,6 +1587,8 @@ defm V_SUBBREV_U32 : VOP2bInst <vop2<0x2
} // End isCommutable = 1
+let isConvergent = 1 in {
+
defm V_READLANE_B32 : VOP2SI_3VI_m <
vop3 <0x001, 0x289>,
"v_readlane_b32",
@@ -1601,6 +1605,8 @@ defm V_WRITELANE_B32 : VOP2SI_3VI_m <
"v_writelane_b32 $vdst, $src0, $src1"
>;
+} // End isConvergent = 1
+
// These instructions only exist on SI and CI
let SubtargetPredicate = isSICI in {
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