[PATCH] D20071: AMDGPU: Make some instructions convergent
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon May 9 09:19:09 PDT 2016
arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.
http://reviews.llvm.org/D20071
Files:
lib/Target/AMDGPU/SIInstructions.td
Index: lib/Target/AMDGPU/SIInstructions.td
===================================================================
--- lib/Target/AMDGPU/SIInstructions.td
+++ lib/Target/AMDGPU/SIInstructions.td
@@ -1218,7 +1218,9 @@
(ins VS_32:$src0),
"v_readfirstlane_b32 $vdst, $src0",
[]
->;
+> {
+ let isConvergent = 1;
+}
}
@@ -1585,6 +1587,8 @@
} // End isCommutable = 1
+let isConvergent = 1 in {
+
defm V_READLANE_B32 : VOP2SI_3VI_m <
vop3 <0x001, 0x289>,
"v_readlane_b32",
@@ -1601,6 +1605,8 @@
"v_writelane_b32 $vdst, $src0, $src1"
>;
+} // End isConvergent = 1
+
// These instructions only exist on SI and CI
let SubtargetPredicate = isSICI in {
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