[PATCH] D19198: [X86][AVX] Generalized matching for target shuffle combines

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

> ! In http://reviews.llvm.org/D19198#424562, @delena wrote:

>  We should add mask register to the printed shuffle. Not in this patch, of course.


I'll add a TODO comment to the relevant files.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24020
@@ +24019,3 @@
+
+  if (!FloatDomain)
+    return false;
----------------
delena wrote:
> I still think that when you replace a shuffle with loading indices to MOVDDUP, the MOVDDUP is better.
> 
The intention is that those will be dealt with by a permute instruction (PSHUFD-int or VPERMILPS-fp) in  a future patch.

This patch is just about trying to set up a 'shuffle matching' framework - later patches will then add support for additional matches (permute / broadcast being early targets). I only added the 256/512 versions as it was a minor extension to whats already there for 128.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24067
@@ +24066,3 @@
+    if (Mask.equals({0, 0, 2, 2, 4, 4, 6, 6})) {
+      Shuffle = X86ISD::MOVDDUP;
+      ShuffleVT = MVT::v8f64;
----------------
delena wrote:
> Can you keep the original VT here?
Annoyingly no but between bitcast combines and target shuffle combines it doesn't seem to cause any problems.


Repository:
  rL LLVM

http://reviews.llvm.org/D19198