[PATCH] D19967: [AArch64] Implement lowering of the X constraint on AArch64

[silviu.baranga@arm.com via llvm-commits]

sbaranga added a comment.

Thanks! Committed in r268907.

-Silviu


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Comment at: test/CodeGen/AArch64/inlineasm-X-allocation.ll:1
@@ +1,2 @@
+; RUN: llc -mtriple=aarch64-none-eabi -mattr=-neon,-fp-armv8 %s -o - | FileCheck %s  -check-prefix=nofp
+
----------------
rengolin wrote:
> Do you need -neon here? Does that force +fparmv8 even with -fp-armv8?
Correct, we don't need it (so I removed it),

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Comment at: test/CodeGen/AArch64/inlineasm-X-constraint.ll:30
@@ +29,3 @@
+;   asm volatile("msr fpsr,$1" : "=X" ((f)): "r" (pscr_value));
+;   return f+f;
+; }
----------------
rengolin wrote:
> f*f. :)
> 
> Same for all below.
Thanks, should be fixed now.

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Comment at: test/CodeGen/AArch64/inlineasm-X-constraint.ll:47
@@ +46,3 @@
+
+; int f3(int f, int pscr_value) {
+;   asm volatile("msr fpsr,$1" : "=X" ((f)): "r" (pscr_value));
----------------
rengolin wrote:
> is this redundant?
Yes, removed.


http://reviews.llvm.org/D19967