[PATCH] D19683: Power9 - Enable the pwr9 cpu in the back end

[Nemanja Ivanovic via llvm-commits]

nemanjai added a comment.

In http://reviews.llvm.org/D19683#420421, @echristo wrote:

> Unrelated to this commit, but does FeatureISA3_0 make sense as a subtarget feature or should more granularity happen here?
>
> Otherwise it would be nice to see any tests that make sure that mcpu=pwr9 is actually doing something :)
>
> -eric


Due to the ISA not having any optional categories, we have decided that for most things, we don't want the granularity that we had with prior ISA levels. What we kind of settled on was the P9Vector, P9Altivec and ISA3_0. If you prefer that we split them out into finer grained features, we can certainly discuss what features we'd want.

For testing, I'll add an -mcpu=pwr9 line to one of the test cases to ensure that the feature is accepted by llc. Functional testing for the target features and predicates is already available in my follow-up patch for the new non-permuting loads and stores.


Repository:
  rL LLVM

http://reviews.llvm.org/D19683