[PATCH] D20032: AMDGPU/R600: Use correct number of vector elements when lowering private loads
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri May 6 14:41:21 PDT 2016
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/R600ISelLowering.cpp:1664
@@ -1663,3 +1663,3 @@
EVT ElemVT = VT.getVectorElementType();
- SDValue Loads[4];
+ SmallVector<SDValue, 4> Loads(NumElemVT);
----------------
Why is this being hit for > 4 elements? Those should have been split up during type legalization already by the time it reaches here
Repository:
rL LLVM
http://reviews.llvm.org/D20032
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