[PATCH] D19862: [mips][fastisel] Conditional moves do not have implicit operands.
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Fri May 6 06:03:24 PDT 2016
This revision was automatically updated to reflect the committed changes.
Closed by commit rL268730: [mips][fastisel] Conditional moves do not have implicit operands. (authored by dsanders).
Changed prior to commit:
http://reviews.llvm.org/D19862?vs=55973&id=56408#toc
Repository:
rL LLVM
http://reviews.llvm.org/D19862
Files:
llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
Index: llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
+++ llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
@@ -692,11 +692,10 @@
emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1);
emitInst(Opc).addReg(LeftReg).addReg(RightReg).addReg(
Mips::FCC0, RegState::ImplicitDefine);
- MachineInstrBuilder MI = emitInst(CondMovOpc, ResultReg)
- .addReg(RegWithOne)
- .addReg(Mips::FCC0)
- .addReg(RegWithZero, RegState::Implicit);
- MI->tieOperands(0, 3);
+ emitInst(CondMovOpc, ResultReg)
+ .addReg(RegWithOne)
+ .addReg(Mips::FCC0)
+ .addReg(RegWithZero);
break;
}
}
Index: llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
===================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
@@ -1,7 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
-; RUN: < %s | FileCheck %s
+; RUN: -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
-; RUN: < %s | FileCheck %s
+; RUN: -verify-machineinstrs < %s | FileCheck %s
@f1 = common global float 0.000000e+00, align 4
@f2 = common global float 0.000000e+00, align 4
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