[PATCH] D19967: [AArch64] Implement lowering of the X constraint on AArch64

[Renato Golin via llvm-commits]

rengolin accepted this revision.
rengolin added a comment.
This revision is now accepted and ready to land.

Some silly comments on the tests, but otherwise, LGTM. Thanks!

Feel free to commit with the necessary changes.


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Comment at: test/CodeGen/AArch64/inlineasm-X-allocation.ll:1
@@ +1,2 @@
+; RUN: llc -mtriple=aarch64-none-eabi -mattr=-neon,-fp-armv8 %s -o - | FileCheck %s  -check-prefix=nofp
+
----------------
Do you need -neon here? Does that force +fparmv8 even with -fp-armv8?

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Comment at: test/CodeGen/AArch64/inlineasm-X-constraint.ll:30
@@ +29,3 @@
+;   asm volatile("msr fpsr,$1" : "=X" ((f)): "r" (pscr_value));
+;   return f+f;
+; }
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f*f. :)

Same for all below.

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Comment at: test/CodeGen/AArch64/inlineasm-X-constraint.ll:47
@@ +46,3 @@
+
+; int f3(int f, int pscr_value) {
+;   asm volatile("msr fpsr,$1" : "=X" ((f)): "r" (pscr_value));
----------------
is this redundant?


http://reviews.llvm.org/D19967