[PATCH] D19931: AMDGPU: Uniform branch conditions can originate with intrinsics

[Nicolai Hähnle via llvm-commits]

nhaehnle created this revision.
nhaehnle added reviewers: tstellarAMD, arsenm.
nhaehnle added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

Discovered by Dave Airlie, fixes an assertion in Khronos OpenGL CTS
GL43-CTS.shader_storage_buffer_object.advanced-matrix.

In this particular case, the buffer load intrinsic fed into a uniform
conditional branch, and led the brcond lowering down the wrong path.

http://reviews.llvm.org/D19931

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll

Index: test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
@@ -0,0 +1,26 @@
+; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
+
+source_filename = "tgsi"
+target triple = "amdgcn--"
+
+;CHECK-LABEL: {{^}}main:
+define amdgpu_ps float @main(<4 x i32> inreg %rsrc) {
+main_body:
+  %v = call float @llvm.amdgcn.buffer.load.f32(<4 x i32> %rsrc, i32 0, i32 0, i1 true, i1 false)
+  %cc = fcmp une float %v, 1.000000e+00
+  br i1 %cc, label %if, label %else
+
+if:
+  %u = fadd float %v, %v
+  br label %else
+
+else:
+  %r = phi float [ %v, %main_body ], [ %u, %if ]
+  ret float %r
+}
+
+; Function Attrs: nounwind readonly
+declare float @llvm.amdgcn.buffer.load.f32(<4 x i32>, i32, i32, i1, i1) #0
+
+attributes #0 = { nounwind readonly }
Index: lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.cpp
+++ lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1356,14 +1356,13 @@
     Target = BR->getOperand(1);
   }
 
-  if (Intr->getOpcode() != ISD::INTRINSIC_W_CHAIN) {
+  if (!isCFIntrinsic(Intr)) {
     // This is a uniform branch so we don't need to legalize.
     return BRCOND;
   }
 
   assert(!SetCC ||
         (SetCC->getConstantOperandVal(1) == 1 &&
-         isCFIntrinsic(Intr) &&
          cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
                                                              ISD::SETNE));
 


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