[PATCH] D19426: [AArch64] Use the reciprocal estimation machinery

[Evandro Menezes via llvm-commits]

evandro marked 2 inline comments as done.
evandro added a comment.

In the meantime, I've been considering how to issue the iterations using `FRSQRTS` and `FRECPS` and it a possible way would be to have new `SDNode` for them, used directly by the `DAGCombiner`, which is by default lowered as a polynomial or, as for ARM, as the respective instructions.  Thoughts?

Thank you.


Repository:
  rL LLVM

http://reviews.llvm.org/D19426