[PATCH] D19713: [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions

[Simon Dardis via llvm-commits]

sdardis requested changes to this revision.
sdardis added a comment.
This revision now requires changes to proceed.

Compiling test/CodeGen/Mips/ldc1.ll with "-mcpu=mips32r6 -matt=+micromips -asm-show-inst" shows the correct assembly but incorrect internal representation:

  ldc1    $f0, 0($4)              # <MCInst #1184 LDC1_D64_MMR6
                                  #  <MCOperand Reg:361>
                                  #  <MCOperand Reg:22>
                                  #  <MCOperand Imm:0>>
  sll16   $2, $2, 3               # <MCInst #1952 SLL16_MM
                                  #  <MCOperand Reg:321>
                                  #  <MCOperand Reg:321>
                                  #  <MCOperand Imm:3>>
  ldc1    $f1, 0($sp)             # <MCInst #1182 LDC164 <- wrong
                                  #  <MCOperand Reg:362>
                                  #  <MCOperand Reg:20>
                                  #  <MCOperand Imm:0>>

This hampers direct object emission as ldc1 has a different major opcodes for microMIPS/MIPS. It appears the backend code doesn't have the correct entries in the relation tables to map LDC164 to LDC1_D64_MMR6, so reloads are incorrect.

Can you get that relationship entry implemented and repost? Thanks.


http://reviews.llvm.org/D19713