[llvm] r268470 - [X86] Lower zext i1 arguments
David Majnemer via llvm-commits
llvm-commits at lists.llvm.org
Tue May 3 17:22:24 PDT 2016
Author: majnemer
Date: Tue May 3 19:22:23 2016
New Revision: 268470
URL: http://llvm.org/viewvc/llvm-project?rev=268470&view=rev
Log:
[X86] Lower zext i1 arguments
i1 is now a legal type for X86 with AVX512.
There were some paths in X86FastISel which were not quite ready to see
an i1 value: they were not quite sure how to deal with sign/zero extends
for call arguments.
DTRT by extending to i8 for zeroext and bailing out of FastISel for
signext.
This fixes PR27591.
Added:
llvm/trunk/test/CodeGen/X86/pr27591.ll
Modified:
llvm/trunk/lib/Target/X86/X86FastISel.cpp
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=268470&r1=268469&r2=268470&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Tue May 3 19:22:23 2016
@@ -3019,6 +3019,10 @@ bool X86FastISel::fastLowerCall(CallLowe
case CCValAssign::SExt: {
assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() &&
"Unexpected extend");
+
+ if (ArgVT.SimpleTy == MVT::i1)
+ return false;
+
bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg,
ArgVT, ArgReg);
assert(Emitted && "Failed to emit a sext!"); (void)Emitted;
@@ -3028,6 +3032,17 @@ bool X86FastISel::fastLowerCall(CallLowe
case CCValAssign::ZExt: {
assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() &&
"Unexpected extend");
+
+ // Handle zero-extension from i1 to i8, which is common.
+ if (ArgVT.SimpleTy == MVT::i1) {
+ // Set the high bits to zero.
+ ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg, /*TODO: Kill=*/false);
+ ArgVT = MVT::i8;
+
+ if (ArgReg == 0)
+ return false;
+ }
+
bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg,
ArgVT, ArgReg);
assert(Emitted && "Failed to emit a zext!"); (void)Emitted;
Added: llvm/trunk/test/CodeGen/X86/pr27591.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr27591.ll?rev=268470&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr27591.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr27591.ll Tue May 3 19:22:23 2016
@@ -0,0 +1,42 @@
+; RUN: llc -o - -O0 < %s | FileCheck %s
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @test1(i32 %x) #0 {
+entry:
+ %tobool = icmp ne i32 %x, 0
+ call void @callee1(i1 zeroext %tobool)
+ ret void
+}
+
+; CHECK-LABEL: test1:
+; CHECK: cmpl $0, %edi
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: andb $1, %al
+; CHECK-NEXT: movzbl %al, %edi
+; CHECK-NEXT: callq callee1
+
+define void @test2(i32 %x) #0 {
+entry:
+ %tobool = icmp ne i32 %x, 0
+ call void @callee2(i1 signext %tobool)
+ ret void
+}
+
+; CHECK-LABEL: test2:
+; CHECK: cmpl $0, %edi
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: kmovb %eax, %k0
+; CHECK-NEXT: kmovw %k0, %edi
+; CHECK-NEXT: andl $1, %edi
+; CHECK-NEXT: movb %dil, %al
+; CHECK-NEXT: xorl %edi, %edi
+; CHECK-NEXT: testb %al, %al
+; CHECK-NEXT: movl $-1, %ecx
+; CHECK-NEXT: cmovnel %ecx, %edi
+; CHECK-NEXT: callq callee2
+
+declare void @callee1(i1 zeroext)
+declare void @callee2(i1 signext)
+
+attributes #0 = { nounwind "target-cpu"="skylake-avx512" }
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