[llvm] r268445 - [X86] Tidied up SDValue's SDNode referencing. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue May 3 14:44:45 PDT 2016


Author: rksimon
Date: Tue May  3 16:44:45 2016
New Revision: 268445

URL: http://llvm.org/viewvc/llvm-project?rev=268445&view=rev
Log:
[X86] Tidied up SDValue's SDNode referencing. NFCI.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=268445&r1=268444&r2=268445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue May  3 16:44:45 2016
@@ -24057,7 +24057,7 @@ static bool combineX86ShuffleChain(SDVal
         Shuffle = Lo ? X86ISD::MOVLHPS : X86ISD::MOVHLPS;
         ShuffleVT = MVT::v4f32;
       }
-      if (Depth == 1 && Root->getOpcode() == Shuffle)
+      if (Depth == 1 && Root.getOpcode() == Shuffle)
         return false; // Nothing to do!
       Res = DAG.getBitcast(ShuffleVT, Input);
       DCI.AddToWorklist(Res.getNode());
@@ -24075,7 +24075,7 @@ static bool combineX86ShuffleChain(SDVal
       bool Lo = Mask.equals({0, 0, 2, 2});
       unsigned Shuffle = Lo ? X86ISD::MOVSLDUP : X86ISD::MOVSHDUP;
       MVT ShuffleVT = MVT::v4f32;
-      if (Depth == 1 && Root->getOpcode() == Shuffle)
+      if (Depth == 1 && Root.getOpcode() == Shuffle)
         return false; // Nothing to do!
       Res = DAG.getBitcast(ShuffleVT, Input);
       DCI.AddToWorklist(Res.getNode());
@@ -24089,7 +24089,7 @@ static bool combineX86ShuffleChain(SDVal
       bool Lo = Mask.equals({0, 0, 1, 1});
       unsigned Shuffle = Lo ? X86ISD::UNPCKL : X86ISD::UNPCKH;
       MVT ShuffleVT = MVT::v4f32;
-      if (Depth == 1 && Root->getOpcode() == Shuffle)
+      if (Depth == 1 && Root.getOpcode() == Shuffle)
         return false; // Nothing to do!
       Res = DAG.getBitcast(ShuffleVT, Input);
       DCI.AddToWorklist(Res.getNode());
@@ -24112,7 +24112,7 @@ static bool combineX86ShuffleChain(SDVal
            {8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15}))) {
     bool Lo = Mask[0] == 0;
     unsigned Shuffle = Lo ? X86ISD::UNPCKL : X86ISD::UNPCKH;
-    if (Depth == 1 && Root->getOpcode() == Shuffle)
+    if (Depth == 1 && Root.getOpcode() == Shuffle)
       return false; // Nothing to do!
     MVT ShuffleVT;
     switch (NumMaskElts) {
@@ -24139,7 +24139,7 @@ static bool combineX86ShuffleChain(SDVal
       Mask.size() == 2 && Mask[0] == 0 && Mask[1] < 0) {
     unsigned Shuffle = X86ISD::VZEXT_MOVL;
     MVT ShuffleVT = MVT::v2i64;
-    if (Depth == 1 && Root->getOpcode() == Shuffle)
+    if (Depth == 1 && Root.getOpcode() == Shuffle)
       return false; // Nothing to do!
     Res = DAG.getBitcast(ShuffleVT, Input);
     DCI.AddToWorklist(Res.getNode());




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