[PATCH] D19825: Power9 - Add exploitation of vector load and store that do not require swaps
Nemanja Ivanovic via llvm-commits
llvm-commits at lists.llvm.org
Mon May 2 13:02:07 PDT 2016
nemanjai created this revision.
nemanjai added reviewers: hfinkel, wschmidt, kbarton, seurer, ehsan, cycheng.
nemanjai added a subscriber: llvm-commits.
nemanjai set the repository for this revision to rL LLVM.
The new lxvx/stxvx instructions do not require the swaps to line the elements up correctly. In order to select them over the lxvd2x/lxvw4x instructions which require swaps, the corresponding patterns are given a higher AddedComplexity.
Repository:
rL LLVM
http://reviews.llvm.org/D19825
Files:
lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCInstrInfo.cpp
lib/Target/PowerPC/PPCInstrVSX.td
test/CodeGen/PowerPC/lxvw4x-bug.ll
test/CodeGen/PowerPC/ppc64-i128-abi.ll
test/CodeGen/PowerPC/swaps-le-1.ll
test/CodeGen/PowerPC/swaps-le-6.ll
test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll
test/CodeGen/PowerPC/vsx-ldst.ll
test/CodeGen/PowerPC/vsx-p9.ll
test/CodeGen/PowerPC/vsx_insert_extract_le.ll
test/CodeGen/PowerPC/vsx_shuffle_le.ll
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